uart address : Software Detect to Buffer- unexpected halt

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AuKa_264411
Level 3
Level 3
25 replies posted 10 replies posted 5 replies posted

I am trying to understand the different addressing modes for the UART on the PSOC5LP. I have managed to get the Software Byte by Byte mode to work.

I made some minor changes to the program to test this mode (and it compiles without complaint) but as I start the debugger when it gets to the part of the code that starts the UART module, the execution stops as if there was a breakpoint there, highlighting the line in yellow, but there is no further clue as to why- see the screen capture below.

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Creator allows me to continue by pressing run. The code I have that is supposed to read the incoming data does not give the expected results and I am not sure whether I need to invest time to understand that if the UART module is not being initialised. If I uncomment the line  //isr_rx_SetVector(MasterRxInterrupt);in the InitialiseMasterSerialCommunications function, the fake breakpoint goes away, but I have no idea if this is correct and what I vector I should be using. The datasheet (P37) says that "all necessary code is implemented in the RX ISR" and the example on the same page only "starts" the module.The description on Page 8 echos this. Although probably irrelevant, the problem persists with the RX buffer set to 20 and also 4 (in violation of the data sheet description).

Edit: (added after 20 minutes)

I also deleted the interrupt that I named isr_rx connected to the rx_interrupt output of the component. No change in the problem.

I discovered that even with "Software Byte by Byte" if the SetVector is not present the fake breakpoint occurs. SO the problem is obviously a need for a vector, but what vector is needed with Software Detect to Buffer?

Edit to here.

Any idea what I am doing wrong?

The UART is set up as follows

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3 Replies
VenkataD_41
Moderator
Moderator
Moderator
750 replies posted 500 replies posted 250 solutions authored

Hi,

Please attach your PSoC Creator project here for us to debug.

Thanks

Ganesh

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Ganesh

This is quite a large project implementing Cypress’ Power Line Communication system ( AN76458)) (did you see my article on the PLC in in Circuit Cellar Oct 2018 issue?). I believe that the rest of the circuitry will confuse the issue and anyway I am reluctant to put proprietary software out in the community/public domain. I have not got the time at the moment to produce a simplified version.

I was investigating the different addressing models to use on this project with an eye to using the information to publish a new blog/article on the subject. I have already written about adding a 9th bit on PC communications (EDN design idea) as well as Cypress AN2269 on adding the 9th bit to UART communications on the PSOC1. SO it would seem logical to continue the theme.

However I have become disillusioned with the idea for a number of reasons, one of which being the discontinuation of Cypress support in favour of this forum. Since I have got the Software Byte by Byte working, I have shelved the concept.

Aubrey

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Hi,

Add code to RX ISR which will be detect the address byte(check UART_RX_STS_MRKSPC status), and move the correctly addressed data bytes to the buffer(along with address byte). Read from FIFO but skip all not addressed data.

Please ensure you are using latest version of PSoC Creator i.e. PSoC Creator 4.2 .

Please check the above two and let us know whether they are working.

Thanks and regards

Ganesh

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