cy8c20236a - gpio interrupt

[Anonymous]

For gpio interrupt，I see the following documents in the chip manual of cy8c20236a.

       

PRTxIE Registers 

   

Bits 7 to 0: InterruptEnables[7:0].  These bits enable the corresponding port pin interrupt. Only four LSB pins are used since this port has four pins. 

       

question：

   

I want to know whether Px[0-3] has  gpio interrupt？

[Bob_Marlowe]

Every port has got the capability of generating an interrupt for each pin. So it is only an exception for some PSoC devices when a port has less than 8 I/O-pins.

       

Bob

[Anonymous]

thank you reply！

   

I see the  documents in the chip manual of cy8c20XX6a. 

   

To IO_CFG1 Register:

       

IO_CFG1 Register

   

Bit 0: IO INT. This bit sets the GPIO Interrupt mode for all pins in the CY8C20x66 PSoC devices. GPIO interrupts are

   

controlled at each pin by the PRTxIE registers, and also by the global GPIO bit in the INT_MSK0 register.

       

question:

   

i want to know whether  IO INT is only seted in the CY8C20x66 PSoC devices . Other PSoC devices cannot  use!

[Bob_Marlowe]

As I said in my last post:"Every port has got the capability of generating an interrupt for each pin"

       

Bob

[ETRO_SSN583]

This might help -

           

          http://www.cypress.com/?rID=2900     AN2094

       

Regards, Dana.