PSoC™ 5, 3 & 1 Forum Discussions

Is it possible to create a 24 bit ADC in psoc 5, if so how? In the same way can we use VHDL besides verilog to build our own components in PSOC 5. 

I have a doubt regarding EMIF, can we interface a 16GB external memory to psoc 5 devices

Hi:

Using C51 Lib in Creator 1.0, printf() works as putchar() re-defined in main file.

But when re-define getchar() to implement scanf(), error happened:

*** ERROR L104: MULTIPLE PUBLIC DEFINITIONS
    SYMBOL:  GETCHAR
    MODULE:  C:\PROGRAM FILES\CYPRESS\PSOC CREATOR\1.0\PSOC CREATOR\IMPORT\KEIL\PK51\8.16\C51\LIB\C51L.LIB (GETCHAR)
    DEFINED:  E:\1_WaveDAC8_SimpleSine.cydsn\DP8051_Keil_816\Debug\main.OBJ (MAIN)

   Any idea about that ?

  Thanks very much.

One of the more powerful aspects of PSoC 3 and PSoC 5 is the ability to use components that encapsulate both hardware and software functionality.  Cypress provides a large library of the most common components that you might need (I2C, UART, DAC), but there is no end to the possible components that PSoC 3 and PSoC 5 can support.  The Creator platform allows you to develop and use your own components using the same methodology as Cypress engineers.

There are 3 levels of components that a user might want to develop:

    
1. Schematic Component
    
2. Verilog Component
    
3. Datapath Component
   

Each level gets progressively more involved and more powerful.  A schematic based component provides a hierarchical schematic capability.  Here you can combine any of the components in the current library and also encapsulate the APIs that go with that combination.  With a Verilog based component you have the ability to pull in more complex unique digital content and take direct advantage of the PLDs built into PSoC 3 and 5.  The capability to do either Schematic or Verilog based components is in Creator today.  The third level, datapath based components, adds to a Verilog component the usage of the datapath resources in PSoC 3 and 5.  With datapaths you can create denser designs and more flexibily communicate between your hardware component and the CPU. 

In order to get you started on the right track, several training classes are developed that include:

    
• Video
    
• Slides
    
• Example Projects
   

They are all posted on the Cypress website under the Design Support tab, then Technical Training, then On-Demand Training, or you can skip directly there with the following links:

    
• PSoC Creator 110: Schematic Components 
    
• PSoC Creator 111: Component Parameters 
    
• PSoC Creator 112: Introduction to Component API Generation 
    
• PSoC Creator 113: PLD Based Verilog Components
   

I am trying to select a part with a 16 bit PWM, 10 bit ADC, and a UART.  How do I determine the resources necessary to select the part and where do I find a list of what is Pin for Pin so I can see future migration options.

Thanks!

It is mentioned in the data sheet that PSOC5 supports AMBA, so it is probably possible to connect a parallel RAM to the chip. Can I expand system RAM to the external chip to get, for example 8MBytes RAM? I was not able to find any sample projects using this feature and there is no application note about this. Thank you!

Hi all,

New to the forum and PSoC Devices. I am also new to my current employer. I have inherited a project that has a CY8C24223A-24PVXI device fitted. I have some source code from a contractor the company has used. I was wondering how I can load the C code back onto the compiler (I have all the Cypress application softwarePSoC Designr 5.1 and the Programmer 3.13.3 ) and then maybe manipulate the C code to generate a new hex file. Not sure how to do this? Any help gratefully recieved.

Kind regards

Jeff