PSoC™ 5, 3 & 1 Forum Discussions
Dear Friends
I met an issue when supporting a customer.That is:
In the customer's hardware system now,the power supply and ground of the analog chips and microcontroller are separate.Except that the digital interface between evevry analog chip(like ADC) and MCU are isolated by
Photo-Coupler.These are just like picture attached.
But if we embed our PSOC5 in the circuit and replace the present analog chips and MCU,the main worry of customer is that how can the analog and digital be entirely separated.
I know that the power supply and ground of the analog block and digital block are separated. But I don't know how do the analog block and digital BUS ,just like the function of Photo-Coupler.
That's all of my question.Thanks a lot!
Are there any plans in the near future to introduce Ethernet as a component with the PSoCs?
This is something every other controller out there can do,and considering the power of the PSoC,it'd be a great addition.
Is this implementation on the cards anytime soon?
Show LessNewbie here,
I'm going though the first example in "My First FIve PSoC 3 Designs" and I receive this error.
"'PWM_Timer_STATUS': undefined identifier"
I downloaded the associated source files and receive the same error.
Any help would be greatly appreciated.
Thanks in advance,
Bryan
Show LessI am facing the problem in connecting the resistor to the circuit ...i send the pic of the circuit and the error too...plz provide some information in how avoid that error.....
Show LessI am using 29666, 48 TSSOP, in a jig with fairly good bypassing, bulk and ceramic.
External 24 Mhz clock to P1(4). Square, fed thru 100 ohm to minimize overshoot, which is 800 mV.
The adjacent pins, P1(2), P1(6), are configured as STD CPU, pulldown.
I read the PRT1DR register and consistantly get a return of "1" for P1(6), even though
nothing is connected to pin, and bit confirmed to have been written as a "0" into register.
Examining all pins in port with fast scope, only on P1(6) do I see ~ 1.5V of the external
clock coupled into the pin from the external clk, P1(4). The clk artifact has overshoot
reaching 2 V, and baseline high level of 800 mV. No other pin in port, all configed as
STDCPU with pulldown exhibits this.
5 pF stray at 24 Mhz is ~ 1.3K, Min pulldown = 4K, so 5V results in ~ 1.2V. But
again no other port pins show anywhere near the coupling that P1(6) does.
Scope probes calibrated by high speed cal routine provided by scope.
Looks like a die layout issue ?
Regards, Dana.
Show LessHi,
I would like to clone the SPI Master component, because I would like to make some slight modifications to the way it behaves. What's the easiest way to do this?
Hugo
Show LessDear all,
Presently I am designing the hardware circuit for my PSoC board.
Based on the schematic of the PSoC development kit CY8CKIT-050 found in the manual for the development kit (p37 under FX2LP programmer), the only connection between the PSoC5 chip and the CY7C68013A-56LTXC is thru the pin15 (XRES) of the PSoC chip to pin20 (PB2/FD2) of CY7C68013A-56LTXC.
Is the programming of the PSoC chip thru the XRES pin (pin15) of the PSoC chip?
Regards
Show Lessat this time I wrote a DP verilog implementation and need to set A1 with a value != 0. If I check the Sim in Modelsim it is always 0. Can someone confirm this? My lines are shown here :
...
cy_psoc3_dp8 #(
.a0_init_a(TRESHOLD_ZERO),
.a1_init_a(8'd8/*TRESHOLD_POS_ON*/),
.d0_init_a(TRESHOLD_NEG_OFF),
.d1_init_a(TRESHOLD_POS_OFF),
.cy_dpconfig_a(dpconfig0))
DP8 ( ...
If it realy a bug, how fast will it be fixed and distributed with the next update. Or even is there a work arround?
Show LessThe data sheet on the PWM block says that the PWM_ReadCompare() can return either a uint8 or uint16. I can only get it to return a uint8 value, but I need it to returna uint16, how can I do this?
The PWM is set as a 16-bit UDB
Show Less