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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
AN82156 explains how to design PSoC® Creator™ components that use PSoC 3 and PSoC 5 Universal Digital Block (UDB) datapath modules. Datapath-based des... Show More
Anonymous
PSoC™ 5, 3 & 1
 hi...          Can any one please suggest the best possible way of generating a 2.048MHz square signal with 50% duty cycle with a better accuracy, us... Show More
Anonymous
PSoC™ 5, 3 & 1
 When there are multiple interrupts performing the same function, for example 2 UARTs which are trying to wake up the device, it is not necessary that... Show More
MarkH_61
PSoC™ 5, 3 & 1
If you would like to learn more about how to design with the PLD inside the UDBs, check out the breif description of the new application note AN82250 ... Show More
MarkH_61
PSoC™ 5, 3 & 1
If you would like to learn more about how to design with the PLD inside the UDBs, check out the breif description of the new application note AN82250 ... Show More
Anonymous
PSoC™ 5, 3 & 1
Hi to all,    Can anybody tell me what are the necessary modifications to implement pulse oximeter on psoc 3 CY8C3866AXI-040ES2 .    here i attaching ... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hi to all,                   Can anybody tell me what are the necessary modifications to implement pulse oximeter on psoc 3    CY8C3866XAI-040ES2. He... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hi to all,                   Can anybody tell me what are the necessary modifications to implement pulse oximeter on psoc 3    CY8C3866XAI-040ES2. He... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hello,             If i store some values(Eg : 10 ,100,1525 ) in PSoC 5 Processor ,can i compare those values with other values(100,200,5000) generat... Show More
Anonymous
PSoC™ 5, 3 & 1
hi to all    here i am uploading a snapshot of the error i have encounterd which i am unable to resolve would anybody please show me a way.         Re... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.