PSoC™ 5, 3 & 1 Forum Discussions
Hi,
I have a mimiprog3. it programs the 3210 eval board when the board is not powered externally using 12 v adaptor. But when 12 v supply is connected the miniprog doesnot recognizes the device. Also it becomeres very hot.
regards
Rocky
Show LessHi Team,
I've a situation where execution time is very critical. (branching to ISR - returning & stuff should occur very quickly.) I tried using normal C code,
void PDI(void)
{
peakdetect_EnableInt();
COMP_1_EnableInt();
COMP_2_EnableInt();
PRT1DR ^= 0x01; // just as a test to whether the comparator responds that quick or not.
}
I got a much delayed waveform on a DSO wherein my event occurs much before & even overlaps occur between consecutive events . Is there a wayout in assembly ? Would it decrease execution time ? If so, please provide sample code or snippets
Thanks 🙂
Show LessGuys,
How can I see that UART is sending and receiving my command in PSoC designer ?
and what's the meaning of :
PRT0DR |= 0X80;
while(PRT0DR & 0X80)
any helps will be appreciated,
thank you
Show LessHi Team,
What is the max. frequency that can be cutoff by a LPF - My design involves a corner freq. around 500 KHz. &&
How does values of C1, C2, C3, C4 affect the same ? Which one should be preferred for a noise ridden (highly unpredictabe) pulse which rises sharply but fades off way too gradually ! (Butterworth/Chebyshev/2 or 4 pole)
Thanks.
Show LessHow are clock generated in PSoC?
Hi Everyone,
The ADC i am using is 16 bit. Its Output on LCD is 049E.The formula i am using for manually converting it to voltages is V(analog)= V ref x (1/2n)xdecimal equiavalent of hexadecimal. is this correct one. and V ref what value we have to use, here i am attaching ADC details.
Show LessWhat is the power consumed by PSoC in sleep mode?
Intra-spoke DMA of > 16 bytes requires a ping-ponging of servicing between the source and destination engines within the DMA logic. The reason is there is a 16 byte internal FIFO that fills up by the source engine after which control is switched to the destination engine to empty that out. This is repeated until the burst is satisfied. This ping-ponging has to occur because both engines are operating on the same spoke.
This normally works fine. But, if a previous DMA request is still being serviced by the destination engine and before the request is finished, the source engine for the new request may hit the FIFO limit. At that point since the destination engine is still working on an old DMA context it doesn't yet signal that the new request is an intra-spoke DMA. In the absence of this indication the source engine fails to send a "go" signal to the destination engine to empty out the FIFO for the new intra-spoke DMA request. The destination engine therefore sits idle and this causes the source engine to hang indefinitely since there is no room in the FIFO to do anymore work.
So its always better to have burst count <=16.
Show LessCan i turn off the IMO when the external clock is used to save power ?