PSoC™ 5, 3 & 1 Forum Discussions
Hey all,
I'm trying to track down the cause of some PSoC5LP firmware running into the default interrupt with errno==ENOMEM.
The only way I've been able to reproduce it is to power cycle the PSoC quickly enough after powerup to catch it, and even then I've only been able to get it to occur maybe once every 50 or so cycles. This makes using the debugger to track it down basically impossible from what I can tell. It almost seems like it might be occurring when the PSoC is undervolted due to very quick loss and re-application of main power, so some "undefined behavior" might be occurring. I know PIC MCUs I've worked with have a "Brownout Reset" function to automatically put the MCU into reset when VDD falls beneath a certain configurable voltage. Does PSoC5LP have anything comparable?
I am running some BIT test on bootup in this firmware and *suspect* it occurs when I manage to power cycle/brownout the system while it is in progress of running these tests. Specifically, I am running an SRAM March Test, a Stack March Test, and a Flash ECC Test on bootup. The code for all these tests was taken from the examples in AN78175 (I made a thread about it months ago, actually: https://community.infineon.com/t5/PSoC-5-3-1/PSoC5LP-Using-SRAM-test-functions-from-AN78175/m-p/283692#M45177).
Right now when I manage to trigger the problem and enter the trap ISR for ENOMEM, I simply have it infinitely loop and blink an LED. I wonder if it would be worth it to try and hunt the exact error cause down. My other thought is that this occurs so infrequently and might be unavoidable enough, to just perform a software reset in the handler and call it a day?
I'd love a second or third opinion on maybe how I should track this down/handle it.
Thanks!
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Hi,
I am looking for a PSoC for Li-Ion battery charging, discharging and BMS integrated application. I found PSoC 3 and PSoC 5LP based design for single cell Li-Ion. However it is only for charging and BMS of single cell. I also want similar on the load side of the battery that can be programmable. Also for a 4S1P or 5S1P battery pack with 24V/upto 6A max output. Kindly advise.
Thanks
Show LessHello PSoC users,
I am attempting to import an old project (2008-2012) that is supposed to be in the release phase and working, the project contains some components in the TopDesign but no trace for them under Genereated_Source folder. I tried regenerating the APIs so it creates those files under Generated_Sources but I did not get the assumed behavior after successful compilation. My question is:" Does regenerating those missing components APIs affect my application or not ?"
Please note that:
- I use the PSoC Creator v2.2 CP6, as was mentioned in the project.h file header, as the last version used to build the project.
- I did not update the components on the TopDesign when prompted.
If you got experience dealing with old PSoC 3 projects resurrection, or if my description is not quite clear, please consider contacting me.
Thank you in advance,
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Hello @MotooTanaka san,
As a continuation to the topic and project (attached in the thread) discussed a while ago, at this link.
I have two RTC firmwares, one without any ErrorDetection and the other with ErrorDetection (return statements in failures) in both the i2c_write_reg() and i2c_read_regs() functions.
Both the firmware work properly when there are no error conditions, especially when there are no connection issues with the RTC module.
But when the RTC module is disconnected during reading,
1.) The firmware PCF8563_Clock_UART.zip, which does not have any error detection or return error statements in the functions, recovers on any number of connect-disconnect instances of the hardware as mentioned in the RTC_NoErrorDetect_ProperRecovery.txt log file attached.
2.) The firmware PCF8563_Clock_UART_Error_NotWorking.zip, which has an error detection and return error statements for different APIs in the functions, does not recover back from the errors and fails forever (unless Hardware Reset) as can be seen in the RTC_ErrorDetect_NoRecovery.txt log file attached.
So, I was wondering if anyone can help me with how to implement an error code returning function that can actually recover back from the error condition (instead of failing indefinitely) and read back from the RTC again.
PS: I am aware using goto statements may not be the best way to get to a pre-defined firmware location.
PPS: The log files are attached as a log_files.zip (since .txt files cannot be attached here).
Regards,
Yash
The original Re: 3 identical shifted signals, 5 Khz, tunnable by program, with sensors
I had to make the new question because the previous somebody marked it 'as solved', then, when I could return to this problem and asked the next subquestion, nobody see it because 'it is marked as solved', although it is far away of being really solved. I'd ask, Solved for who? If the person with the question can't handle the answer as something that solves the real problem, it is not solved.
So, excuse me for the delay. I'm now back with this problem. I hope CONSULTRON could continue helping me as he gave me the example I'm working with.
As I stated first, I need to move frequency about +- 12% from a frequency, that is a little lower than 5 KHz, in order to sustain some resonance on the system. i have seen what you sent, I understand that the clock was defined as the 8 bit period (256) multiplied by 5,000 Hertz, so you get a clock of 1.28 MHz. but as I need to move smoothly the frequency from the program (see the image freq_resonance attached), I see at first sight two posibilities:
1. To change the frequency on the clock with Clock_SetDividerValue(uint16 clkDivider) or
2. To change Period of the first PWM
The problem is that I don't know which values are elegible in case 1. and that the steps that would be available in case 2. are very wide (18.35 Hertz per step), and, if the range is about 564 Hertz for each side, with 30 steps I'll never can sustain resonance (I would correct from a derivative control factor, but if it doesn't work, it would become a PID algorithm). I think that the minimal step should be about 4 or 3 Hz. At the beginning, the program will scan the range until it finds the resonance frequency. The input for the program will be a sound, so when amplitude reach a peak, the program has to avoid loosing resonance moving frequency as needed. The resonance freq. could vary a little with rise of temp, the system has to make the changes needed, if amplitude begin to decrease, it has to oscilate slowly to verify on which direction it reaches the peak again (zero slope). I think that the green range, of about 500 Hz will be enough, but I'll know it until the experiment be phisically implemented.
Another thing that I want you to help me is the next: I have to sustanin resonance, but I want to read and display several sensors (a microphone, temp, presure, amp, volt, etc). How can I do all that? That is, I think I have to avoid to wait for response, it be a sensor, the display or whatever, so I think I would have to have a clock and each component would check if the delay time is reached for it, each round of the program, so for instance, it could send another data to display or it could read an ADC register if a flag is now on on each one. This way I don't interrupt the frequency generator. (supposing that it become stopped while a delay instruction is working) So, if You could help me to make clear this item I'd thank you a lot.
I have not reviewed the other example you gently sent me, but from a surface sight, I think that LUT can't comply with the requirement of min step here stated, but you can correct me if I'm wrong.
I wonder if, as it is marked as solved (I don't understand what for is that costume of setting as solved this), this question will be seen and attended. I hope it be...
Thank you again
Luis
I have checked the signal of the example in my psoc 5 and an image of it is attached as Fase1 y 2. That means that I have saved some obstacles until having it working. This is not much, but it is some advance. I'm going to put more time on this project in next weeks.
PSoC Creater 4.4 will program my CY8KIT-059.
However, Programmer 4.00 will not recognize the device.
However, Programmer will detect my CY8KIT-147.
What must I do to get Programmer to detect the CY8KIT-059 ?
If you are using Visual Studio with Mac and PSOC5 (or even possibly PSOC6), you probably recently got several deprecated messages, one for the compiler, one for the Cortex-Debug.
The new compiler is available at https://developer.arm.com/tools-and-software/open-source-software/developer-tools/gnu-toolchain/gnu-rm/downloads
The Cortex-debug requires an update to launch.json, replacing runToMain: true with "runToEntryPoint": "main"
You can find more information on how to configure these updates at https://socmaker.com/?p=1093
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I'm making improvements to my custom Term component.
I've got a modest work-around to determine if the host port is open. I'd like to improve upon that.
The goal: Quickly determine if the Host port is open and ready to comm or if the host port is closed and DO NOT try to transmit.
Note: USBUART_CDCIsReady() will not work in this instance since it will always return 'not ready' if the Tx buffer is full OR if the HOST port is NOT opened.
I've gone through the datasheet, the USBUART component source code, and made some experimental code. All to no luck.
Is there an API or Global variable that indicates whether the Host port is open?
Thanks in advance for your help and suggestions.
Show LessHello,
I'm a PhD researcher in University Nacional of Cordoba, Argentina. As part of my research, I'm investigating the PSoC 5LP CY8C58LP Switched Capacitor and Continuous Time Block and I have some questions regarding the capacitor values in the TRM.
This is the figure 28-1 of the TRM showing the complete block:
In this diagram, the values the capacitor named “comp” are between 1.24fF and 5pF but in table 28-3 the “comp” capacitor values are between 3pF and 5.1pF.
Are the values in the table for all possible configurations of the SC-CT block? Or it can take other values as well?
On the other hand, I’m analyzing the variation of the capacitor values between the output driver and the negative input terminal (feedback capacitance) depending on the mode.
For example, if the block is used as Continuous Time Transimpedance Amplifier (TIA), this is the capacitance values table 28-9.
Nevertheless, not all those values match the ones in figure 28-1 or combinations among them. Are there any other capacitors than the ones in the figure?
Even more, in the figure 8-13 of the CY8C58LP family datasheet, there’s a C2=1.7pF capacitor that is not in figure 28-1 of the TRM.
Is the figure 28-1 incomplete? If that´s the case, can you share with me a more complete diagram of SC-CT block where I can see all capacitors?
Thanks in advance.
Best regards,
Delfina Velez
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