PSoC™ 5, 3 & 1 Forum Discussions

Hi,

I tried to use GLCD controller component with 480x272 8bit col., touchscreen, PSOC5-60MHz.  It could be very usefull componet, but drawing to display  is quite slow. Yes, i could use virtual page, but it spend large amout of expensive SRAM(frame buffer).

I find out in GLCD controller datasheet that writing to frame buffer proceed on in blanking intervals.  Try everyone to write to frame buffer between two posedge dotclock using own component for the purpose acceleration? (controll registers+mux or verilog componet)? Eventually any idea to improve draving speed?

Thanks,

Jan

  Hi I have finally recevied my PSOC5 kit yesterday only to notice the warnings about the electrostatic senstivity.... now there is a problem because where I live we don't have antistatic wristwrap or mats.

I was told to simply bring a large piece of iron and touch it every now and then to dissipate the static electricity, is this true? are there any other ways??

Project archive attached. Please help. Special mention - Bob & Dana. 

Thanks,

RAM

Hi Guys,

    Could you please llet me know if UDB logic configuration can be preserve or not when a software or watchdog reset in PSOC parts?  thanks.

Hi there.

How do I use the analog out pins of PSoC to generate waves, say triangle wave etc?

 Are you running out of counters/Timer/PWMs in the PSoC UDB due to the Datapath resources being utilized? Thes countcell counters will come in to a rescue then. These counters use the control cells in the UDB, and hence we have a privilege to use 24 of them in PSoC3/5LP architecture. The control cells shall either be used as a control register or as a 7 bit counter lilke this.

Remember that these are 7 bit counters that counts down and not 8 bits.

To get this counter up and running, we need to instantiate the following code,

cy_psoc5_count7

counter(

/* input */.clock(clk),

/* input */.reset(reset),

/* input */.load(1'b0),

/* input */.enable(enable),

/* output [06:00] */.count(count2),

/* output */.tc(tc1)

);

Just hook up the appropriate inputs to this module and get the counter running. A very important point to remember here is that, to enable this counter, we need to enable the counter both in the hardware and also in the software. In hardware, the enabling happens, when the appropriate enable signal is hooked up in the module above. To enable the counter in the software, we have to set the 5th bit in the Auxiliary control register. To do that, open the "cyfitter.h" and figure out the appropriate Auxiliary register for that instance and write a 1 to the 5th bit. The register will look like the one shown below

countcell_1_cnt7_counter__CONTROL_AUX_CTL_REG |= 0x20;

This will enable the counter in software.

Happy designing,

Rahul ram