PSoC™ 5, 3 & 1 Forum Discussions

hello, I am currently using PSOC 5LP CY8C5888LTQ-LP097 for my course's assignment project and I am new to this microcontroller. I want to try  to create a pin that connected to VDAC to output a voltage and another pin connected to SAR ADC to read the output voltage. The physical connection is only the VDAC pin to SAR ADC pin. I tried to use USB UART to serial print the value output voltage through putty > serial > COM 5 . However, nothing showed up in the serial window. The attachment is the file of my project. Thank you.

Hello,

What would be the issue with SPI setup because there is a big gap/delay between data while I would like to send it continuously?

The source code is simple:

void send_packet(void) {
    uint8_t i;
    for(i=0; i<82; i++) {
        SPI_IR_WriteTxData(0xAAAA);
    }
}

As on the attached picture it is sending two 16 bit data continuously and then there is a 2.6ms delay before the next group of data.

Thanks!

Hi,

in my PSoC5 project I ran into a strange problem.

If I use a certain amount of components in the project the timer used for for scheduler does not wake up after sleep/hibernate.

I can't figure out what's the problem. I have two identical rather complex sheets in the PSoC-Creator poject with several timers, PWMs, etc. Initializing the components in the second sheet creates the problem. I don't know if its a problem with clocks, components, interrupts or anything else. I make use of user components also.

Any suggestion is appreciated.

Hello,

how to clear FIFOs of Shift Register component?

In my application, sometimes I load the FIFOs but an error occurs and I need to clear them very quickly!

If I well understood, no API's are provided.

And how to be sure that they are really cleared?

Regards

Hello,

We are using UDB I2C master component to talk to some slave devices. I try to create some code that will result in error status when I2C slave device detached.

Below code snippet(I2C_PSOC is the I2C component name), status is  always 0 after running line 2, after halt for 1.9 seconds. status is always I2C_PSOC_MSTAT_WR_CMPLT in line 6. I can see from logical analizer that there is no I2C slave response and it does translate to a NAK. the I2C data line stay low after I2C master send the I2C slave address for 1.9 seconds.

Should I expect a I2C_PSOC_MSTAT_ERR_ADDR_NAK for status? I2C no slave device

1 int i2c_write(uint8_t address, uint8_t *data, uint8_t size) {
2    uint8 status = I2C_PSOC_MasterWriteBuf(address, data, size, I2C_PSOC_MODE_COMPLETE_XFER);
3    do {
4        status = I2C_PSOC_MasterStatus();
5    } while(!(status & (I2C_PSOC_MSTAT_WR_CMPLT|I2C_PSOC_MSTAT_ERR_MASK)));
6    if(status & I2C_PSOC_MSTAT_ERR_MASK) {
7        return status;
8    }
9    return 0;
10}

I'm trying to use this to measure supply voltage and dead battery levels, but it's a bit off.  (I set a threshold for 4.8 V and it's actually around 4.9 V.  I set a threshold for 3.2 V and it's actually around 3.25 V, etc.)  How much accuracy can I expect to get from this?

Dear all,

We intend to use a PSoC 5 LP, but due to chip shortage will start our development using the PSoC 5 (of which we have secured some stock).

We have a bootloader and a main application of which the main application will be interacting with the peripherals. We would like to have all or peripherals in a known state when the bootloader running. We intend to achieve this by defining pull-ups and pull-downs in our schematic and need to have all pins in a high impedance state.

Reading PSoC 5LP: CY8C52LP Family Datasheet 6.4.16 Reset Configuration, it seems that all IOs are set to High Impedance at reset and that later on they are reconfigured. Does this imply that the all pins that are not configured remain in a high impedance state?

I found the same statement ("At reset, all I/Os are reset to the High Impedance Analog state. ") in the PSoC 5: CY8C52 family datasheet in section 6.4.16. Does that imply that the high impedance state is also maintained for pins that are not differently configured?