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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
 Hi,    My requirement is to output data in microseconds, and I am using many timer interrupts to achieve it in my code. The result is unexpected jitt... Show More
Anonymous
PSoC™ 5, 3 & 1
I found following code in forums     It's a code for filtering process    can any body explaing any line of this code?    I want to give input from ps... Show More
Anonymous
PSoC™ 5, 3 & 1
 The PSoC 3 CY8C38 Family Datasheet says:                              Simultaneous access of SRAM by the 8051 and the DMA controller is possible if d... Show More
DaHu_285096
PSoC™ 5, 3 & 1
I have a project that needs to output a 125 kHz signal, modulated by 2400 Baud data stream.    Before I reort to bit-bashing the application, I though... Show More
Anonymous
PSoC™ 5, 3 & 1
I "m using Psoc1 CY8C28452 device . Everything complied level as long as used digital blocks. But when use any analog user module and write to compile... Show More
melac_296496
PSoC™ 5, 3 & 1
 I am working with PSOC 3, and I am using internal EEprom block that I can scan serial number to.      What I would like to achieve is that when I dow... Show More
Anonymous
PSoC™ 5, 3 & 1
I found following code in forums     It's a code for filtering process    can any bode explaing any line of this code?    I want to give input from ps... Show More
Anonymous
PSoC™ 5, 3 & 1
I have an unusual problem with reading the correct value from the CyResetStatus variable. I start the watchdog and then delay much longer than the all... Show More
Anonymous
PSoC™ 5, 3 & 1
I'm working on a project where I'd like to have a counter increment with a base other than 1, i.e.:     A = A+Base    So far I've used a PulseConverte... Show More
Anonymous
PSoC™ 5, 3 & 1
        Hello together, im working with a CY8CKIT-050. Sometimes I have the problem that the timer (32 bit udb) not count correctly. (example: 962945,... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.