Hello,
I am trying to read data from ADC. If I probe signal lines with a logic analyzer, I can see actual samples (with their respective headers). If I look at data read by SPI slave peripheral using a debugger, I just see some meaningless numbers. Do I have a mismatch on CPOL/CPHA?
CY_ISR_PROTO(RxC1);
CY_ISR_PROTO(RxC2);
void SendData();
uint8_t Data1[32] = {0};
uint8_t Data2[32] = {0};
uint8_t Ptr1 = 0;
uint8_t Ptr2 = 0;
volatile uint8_t Ready1 = 0;
volatile uint8_t Ready2 = 0;
uint32_t Channels[10] = {0};
uint8_t Usb[40] = {0};
void ADCData_Init()
{
Data1_RxC_StartEx(RxC1);
Data2_RxC_StartEx(RxC2);
SpiData1_Start();
SpiData2_Start();
}
CY_ISR(RxC1)
{
while(SpiData1_ReadRxStatus() & SpiData1_STS_RX_FIFO_NOT_EMPTY)
{
uint8_t dummy;
if(Ptr1 < 32)
{
Data1[Ptr1++] = SpiData1_ReadByte();
}
else
{
dummy = SpiData1_ReadByte();
if(dummy < 0xFF)
{
Data1[0] = dummy;
Ptr1 = 1;
}
}
if(Ptr1 == 32)
{
Ptr1++;
Ready1 = 1;
if(Ready2)
{
Ready1 = 0;
Ready2 = 0;
SendData();
}
}
}
}
CY_ISR(RxC2)
{
while(SpiData2_ReadRxStatus() & SpiData2_STS_RX_FIFO_NOT_EMPTY)
{
uint8_t dummy;
if(Ptr2 < 32)
{
Data2[Ptr2++] = SpiData2_ReadByte();
}
else
{
dummy = SpiData2_ReadByte();
if(dummy < 0xFF)
{
Data2[0] = dummy;
Ptr2 = 1;
}
}
if(Ptr2 == 32)
{
Ptr2++;
Ready2 = 1;
if(Ready1)
{
Ready1 = 0;
Ready2 = 0;
SendData();
}
}
}
}
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VDDIO5VポートとVDDIO3.3Vポートの入力信号を、
PSoCCreator上でLOGICに入力(例えばAND)してVDDIO5Vポートで出力したいのですが、
異なる入力電圧で正常に論理出力可能でしょうか。
よろしくお願い致します。
Can someone please tell me what this means?
this happens when i add ist module and connect it to uart tx_en port
im really bad at this, just trying to follow a video lecture
hope someone helps me..
Show LessI just inherited code that sets a reserved bit that does make a difference in a capsense measurement. When the reserved bit is set I get "proper behavior" . I did not set this bit in a test and the capsense was reading out raw data at 255 range when it should have been reading 0. To get this design to work this bit has to be set. What does this bit do and how in the world could of my predecessor known to set it????
This bit is bit 7 in CS_CR3 that is being set by the following code segment.
CS_CR3 |= 0x90; // Reference buffer to drive the analog global bus. Bit 7 is not used so why was it set? Reserved bits should not be set. Without it the raw capsense value reads 255 instead of 0
// CS_CR3 |= 0x10; // Reference buffer to drive the analog global bus. Causes 255 to be read in raw value instead of 0 .
Then the capsense code below this.
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The datasheet says that the comparators may be preceded by a low pass filter. A low pass filter appears on the analogue routing diagram. The lime green is my addition. It's greyed-out.
There is no LPF in the comparator config and there isn't a LPF in the component catalogue.
How do I get my mitts on this component? It seems tantalisingly out of reach.
I bet I'm doing something silly.
PSoC Creator 4.4, Win 10, CY8C5666AXI-LP001
Show Less私はPSOC5LPにてSDカードを使用したプログラムを書いています。
emfileとFS.hを使用しています。
できる限り省電力にしたいため、SDカードの電源も制御しようとしています。
そのため4端子の3.3Vレギュレータを用いてsleep前にSDカードの電源を切っています。
また、SPIのCS端子もLOWに設定するようにプログラムを書きました。
#include <project.h>
#include <FS.h>
#include "stdio.h"
FS_FILE * pFile;
int main()
{
CyGlobalIntEnable; /* Enable global interrupts. */
CONS_Start();
FS_Init();
while(1){
SD_Power_Write(1);
emFile_SPI0_CS_Write(1);
pFile = FS_FOpen("\\data\\4.csv", "a");
if(pFile)
{
if(0 == FS_FClose(pFile))
{
CONS_PutString("File was closed\r\n");
}else
{
CONS_PutString("Failed to close\r\n");
}
}else{
CONS_PutString("Failed to write file\n");
}
SD_Power_Write(0);
emFile_SPI0_CS_Write(0);
CyDelay(5000);
}
return 0;
}
こちらのプログラム実行結果が下記の内容です。
Start
File was closed
Failed to write file
Failed to write file
Failed to write file
Failed to write file
Failed to write file
Failed to write file
電源を一度切るとその後はファイルを開くことができません。
電源を切る前に実行すべきメソッドがあるのでしょうか?
それともそもそも電源を切ってはならないのでしょうか?
追記:
回路図と使用部品を記します。
microSDソケット:https://akizukidenshi.com/catalog/g/gK-05488/
SD電源用4端子レギュレータ:https://akizukidenshi.com/catalog/g/gI-09261/
主電源DCDC(3.3V出力):https://strawberry-linux.com/catalog/items?code=12060
Show LessHi,
i am trying to connect one SAR ADC to a two channel filter. i expect to filter each sample on both filters simultaneously.
i tried to follow ADC to Filter –Dual Channel 16-Bit Streamingusing DMA–PSoC® 3 / PSoC 5 EP58353
but i don't see any ADC nrq. first i attempted to implement ADC to SRAM and that word fine.
please help me to configure every thing.
Thanks
Show Less
Hello,
I am using a time-stamp method of measuring a frequency of a signal. The signal is a square wave, and causes a DMA transfer to start when a rising edge is detected. There is a circular RAM buffer that holds the timestamps / counts of the timer each time the input signal has a rising edge. A function is called periodically to subtract the counts from each other to estimate the frequency.
I used the example project from the CONSULTRON which is posted here:
https://community.cypress.com/t5/Code-Examples/Multi-Input-Frequency-Measurement-Tutorial/m-p/183038
Everything works as expected when I use the "Fixed Function" timer block with 16-bits. However, when I try changing it to a 24 or 32-bit UDB timer block, the counts do not make sense. The least-significant-byte of the RAM buffer always has the same value for some reason. When I look at the debug window for the component, the count matches what is expected in the MEMORY viewer, but it seems like the value at that address is not being transferred via DMA?
I referenced AN61102 which shows how to transfer 32-bit values from 16-bit spokes. I added another DMA channel as an intermediate step, and from the intermediate step goes to the larger buffer.
I was using the following #define in the DMA configuration to retrieve the counts, which is 0x4000_6508: Timer_Count_COUNTER_LSB_PTR_8BIT
Show LessDear Cypress Community,
I am using an evaluation board for PSoC 5LP (CY8CKIT-059) and trying to downmix a signal.
My aim is to downmix a noisy signal that contains a very small sine wave (1mVpp) whose frequency is known, e.g., 10 MHz. The DC value I would get after the mixing+filtering tells me if that sinewave is present in the signal or not.
I was able to achieve this only for sine waves of max. 4 MHz using the mixer component of 5LP.
Question: Is it possible to mix with a frequency higher than 4 MHz so that I can downmix a 10 or 15 MHz signal?
I ask this because I do not want to include/pay a separate (I-Q) demodulator in my design.
Cheers,
Matija.
Show Less
Hello.
Customer used CY8C5868LTI-LP039.
And they used EEPROM and DieTemp components.
When die temperature measurement is started, writing to EEPROM becomes fail.
If DieTemp_1_Start () is not called, EEPROM_1_Write () will succeed.
But EEPROM_1_Write () will fail if there is DieTemp_1_Start ().
Error status is CYRET_UNKNOWN.
Why is EEPROM_1_Write () an error?
And could you please let us know a method that EEPROM_1_Write () will succeed even if there is DieTemp_1_Start ().
Best Regards.
Yutaka Matsubara
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