PSoC™ 5, 3 & 1 Forum Discussions
I'm trying to dma from ADC DelSig into memory, chained. I used the DMA tool to generate the code.
Bringing the ADC EOC out to a pin shows it is bouncing, but I never get an ISR notification of DMA complete.
I think I'm doing something wrong. Here is the code and a picture of the schematic.
Any suggestions as to what I'm doing wrong and how to fix?
Pic of the schematic under question is attached
#include <project.h>
/* Variable declarations for DMA_1 */
/* Move these variable declarations to the top of the function */
uint8 DMA_1_Chan;// the handle for this DMA unit
int finishedDMA_1; // set to 1 when the DMA is irq is triggered
uint8 DMA_1_State; // current state of the DMA unit
uint8 DMA_1_TD_InUse; // which TD is in use currently (filled in at DMA Complete interrupt)
uint8 DMA_1_TD[4];
int16 WaveForm1a[3750];
int16 WaveForm1b[3750];
int16 WaveForm2a[3750];
int16 WaveForm2b[3750];
/* DMA Configuration for DMA_1 */
#define DMA_1_BYTES_PER_BURST 2
#define DMA_1_REQUEST_PER_BURST 1
#define DMA_1_SRC_BASE (CYDEV_PERIPH_BASE)
#define DMA_1_DST_BASE (CYDEV_SRAM_BASE)
void configDMA_1() {
// init channel
DMA_1_Chan = DMA_1_DmaInitialize(DMA_1_BYTES_PER_BURST, DMA_1_REQUEST_PER_BURST,
HI16(DMA_1_SRC_BASE), HI16(DMA_1_DST_BASE));
// set up transfer descriptors
DMA_1_TD[0] = CyDmaTdAllocate();
DMA_1_TD[1] = CyDmaTdAllocate();
DMA_1_TD[2] = CyDmaTdAllocate();
DMA_1_TD[3] = CyDmaTdAllocate();
// configure td
CyDmaTdSetConfiguration(DMA_1_TD[0], 3750, DMA_1_TD[1], TD_INC_DST_ADR | TD_AUTO_EXEC_NEXT);
CyDmaTdSetConfiguration(DMA_1_TD[1], 3750, DMA_1_TD[2], TD_INC_DST_ADR | TD_AUTO_EXEC_NEXT);
CyDmaTdSetConfiguration(DMA_1_TD[2], 3750, DMA_1_TD[3], TD_INC_DST_ADR | TD_AUTO_EXEC_NEXT);
CyDmaTdSetConfiguration(DMA_1_TD[3], 3750, DMA_1_TD[0], TD_INC_DST_ADR | TD_AUTO_EXEC_NEXT);
// set addresses
CyDmaTdSetAddress(DMA_1_TD[0], LO16((uint32)ADC_DelSig_DEC_SAMP_PTR), LO16((uint32)WaveForm1a));
CyDmaTdSetAddress(DMA_1_TD[1], LO16((uint32)ADC_DelSig_DEC_SAMP_PTR), LO16((uint32)WaveForm1b));
CyDmaTdSetAddress(DMA_1_TD[2], LO16((uint32)ADC_DelSig_DEC_SAMP_PTR), LO16((uint32)WaveForm2a));
CyDmaTdSetAddress(DMA_1_TD[3], LO16((uint32)ADC_DelSig_DEC_SAMP_PTR), LO16((uint32)WaveForm2b));
// set initial td
CyDmaChSetInitialTd(DMA_1_Chan, DMA_1_TD[0]);
// enable
CyDmaChEnable(DMA_1_Chan, 1);
}
/******************************************************************************
* Function Name: DmaDone
*******************************************************************************
*
* Summary:
* Handle Interrupt Service Routine. Source - DMA.
*
******************************************************************************/
CY_ISR(DmaDone)
{
finishedDMA_1 = 1u;
// pick up current operational prameters
CyDmaChStatus( DMA_1_Chan,&DMA_1_TD_InUse, &DMA_1_State);
}
int main()
{
/* Place your initialization/startup code here (e.g. MyInst_Start()) */
ADC_DelSig_Start();
configDMA_1();
/* Setup the Interrupt connected to the nrq terminal. */
isr_DMA_1_StartEx(DmaDone);// this call takes the address of our ISR. isr_DMA_1_Start() assigns default address
ADC_DelSig_StartConvert();
CyGlobalIntEnable; /* Uncomment this line to enable global interrupts. */
for(;;)
{
/* Place your application code here. */
}
}
Show LessI tried the USB HID Keyboard (AN58726) with the CYCKIT-001 and the PSoC 3 Processor Module.
It works fine when I connect it to an USB3 Port but I was not able to get it working when I connect it to an USB2 Port.
I tried with WIN XP, 7, 8.
Can anyone help, please!
Show LessHello Everyone,
I have just finished designing and building a tangentially tracking tone arm for LP record players.
The next thing to do is to design the electronic servo that controls the motion of the tone arm.
I am attaching a PDF of a block diagram to show how I intend to accomplish the above.
My questions are:
1) Should this be done with a micro processor and which one?
2) Which development kit should I buy?
3) Should I be proficient in the programming laguage? (I'm not!)
4) Is there a glossary available, of the jargon associated with micro processors, such as FIFO, UART, etc.?
I am familiar with basic electronics even though I have never actually designed any circuits.
At one point during my professional life I designed tape transports for a manufacturer of professional studio tape machines.
That included electronic packaging and taping of printed circuit boards.
I am mentionig all that to show that I am not a stranger to the industry.
I am hoping that this post is the beginning of a series of helpful information so that I may finish my project.
Sincerely,
Ralf
Show LessCapSense applications should always have "autocalibration" parameter enabled as this helps in compensating for the PVT (Process, voltage, temperature) variations.
AutoCalibration calibrates the RawCounts to the required percentage of "resolultion" (the percentage is specified in the respective User Module datasheets). This is done whenever the UserModuleInstance_Start() API is called i.e. on every power up of the device.
This ensures that the base RawCount value is same across all the devices irrespective of the variations in IDAC, pin/sensor pad parasitic capacitance, temperature etc and hence also ensures the required sensitivity (provided other user module parameters are selected properly as per the tuning procedure mentioned in the design guides/user module datasheets) for all boards.
If the auto-calibration is not enabled, failures may be seen with some boards due to temperature change/ board to board variations etc.
Show LessHi,
I want to connect a 16-bit SRAM to the EMIF of a PSoC 5LP. I'm a bit confused about 8-bit transfers on a 16-bit interface.
EMIF component datasheet states:
"...it should not initiate 8 bit transfers to 16 bit memories"
However, the 5LP technical reference manual says:
"...the PSoC 5LP cannot initiate 8 bit transfers to 16-bit memories and should not initiate unaligned 16-bit or 32-bit transfers to an external memory, as the processor may convert these into multiple 8 bit aligned accesses."
So, the questions are:
1) in general, does it mean that for each variable where a size of 8-bit would be enough a 16-bit variable must be used when EMIF is invoked? -> so, for example, 8-bit arrays for receive buffers or similar aren't possible?
2) the statement from the TRM says that the processor converts unaligned 16/32-bit transfers to 8-bit aligned ones - this could(!) be read as that the processor is able to do a 8-bit transfer... so, is it possible or not?
Regards,
Ralf
Show LessI was enthusiastic when I saw that the PSoC5 LP parts have working EMIF controllers, as I really like the flexibility that the PSoC parts provide compared to normal microcontrollers. I have a project right now that I would like to use a PSoC5 LP on, but I need to attach multiple memories to it - specifically a 8Mbit (512kx16) async SRAM and an FPGA with an async SRAM-like interface. It would be nice if these were memory mapped together such that a DMA could be set up to copy data from the FPGA to the SRAM and vice-versa.
The trouble is that there doesn't appear to be a way to use the address lines to selectively enable the parts. Ordinarily, I would just drop a bit of logic on a the high address line to control which part gets the CEn signal, and I can do it here, but it seems like there should be some way to do this internally. Other than routing the MSB of the address bus back in on another pin, is there a way to do this?
Thanks!
Show Less