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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
All,    I could not figure out where to post this so moderators please accept my apologies and move this accordingly.    AS part of my final evaluatio... Show More
Anonymous
PSoC™ 5, 3 & 1
I need a way to measure 16 Hobby Servo Signals (1 to 2 ms pulse length and roughly 20ms repetition rate) with low resolution (10us resolution is more ... Show More
JaVa_282241
PSoC™ 5, 3 & 1
Hello,    I would like accomplish next operation in DFB block:     When signal In1 present take value of stage A register and execute in MAC operation... Show More
Anonymous
PSoC™ 5, 3 & 1
Trying to output a 'message' string with the uart, but I only get the first six bytes and then it goes silent.  I thought is may have been the TX buff... Show More
RaAl_264636
PSoC™ 5, 3 & 1
Hi,         I want to use the EMIF. Since the EMIF is not part of the GCC default linker file, a custom linker file has to be created.    This documen... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hi    An example project for PSoC5LP EMIF interfacing to Cypress Fast SRAM CY7C1019DV33-10ZSXI   is attached.    This can be used as reference projec... Show More
dog-one
PSoC™ 5, 3 & 1
        Shift Register v2.30 component seems to have some issues.    Show More
Anonymous
PSoC™ 5, 3 & 1
I am trying to use the SPI Master block in bidirectional mode (only one sdat pin instead of MOSI and MISO). I can't seem to get a read signal. Is ther... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello,    Very new to these forums.  I am evaluatinG gthe PSoC3 on the CY8CKIT-030 platform and I was wondering what the maximum frequency I can get o... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hi     I want to read the analog values of accelerometer and want to print in the monitor, whether it is possible in PSOC5LP through PSOC creator.   ... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.