PSoC™ 5, 3 & 1 Forum Discussions
Hi,
We're using a PSoC 5LP with a basic UART CDC driver and code just printing "hello" once a second.
Connected to a Mac we just monitor the output in a Terminal (also tested on a Windows machine via Putty).
After just a few seconds, the usb serial connection drops for unknown reasons. Power scoped and looks good so assume this is something we just missed and/or some timing issue. Not sure though how to best debug further. Hopefully it's something simple...
On the mac-side it looks like this:
07/12/15 16:07:41,000 kernel[0]: USBF: 15199.861 AppleUSBXHCI::DoControlTransfer sync request on workloop thread. Use async!
dumping the registers before (when it works) vs after (when it has died), comparing the two, the only diff is:
USB_SIE_EP3_CR0 became 0x49, which should be bit 6 according to the TRM -> 6 err_in_txn...
The Error in transaction bit is set whenever an error is detected. For an IN transaction, this indicates a no response from HOST scenario. For an OUT transaction, this represents an RxErr (PID error/ CRC error/ bit-stuff error scenario). This bit is cleared by any writes to the register. 0- No errored transactions since bit was last cleared. 1- Indicates a transaction ended with an error.
ps. I double-checked our design against the CY8CKIT-059. Nothing really that can be wrong in terms of how USB is tied up. One difference though is that our VDD* is 1.8 and 3.3V only, not "usb vbus: 5V" as on the kit, but I assume that shouldn't matter right?
Thanks David
Show LessHi all!
This is the first time i post on this forum. I am developing my final degree project with a CY8C28445. It's simple, i'm using resistive sensor as proximity-pressure sensor, to get the proximity i use Capsense, and the pressure measurement is obtained from ADC. The problem is that i have already a manufactured PCB with the components assembled. Due to this, i have to share a pin (P0[1]) between capsense shield_electrode_output (Global out even) and ADC input(Analog in).
My doubt is, how can i change from a global odd/even output to analog in and vice versa ? I have read some application notes and the TRM and i really don't know how to to do this. I thought a possible alternative by changing the ADC input from Analog in (Analog column) to Analog mux input, the problem is that i don't understand the way to select an input from others. Do i have to change the other pins PRTXGS
I hope you can help me cause im stuck.
Thank you all!!!
PD:
Show Lessyou can connect the LPF2 the psoc 1 to oscilocope?
Hi,
I think I've got a problem with the new EEPROM 3.0 API. I used the old EEPROM API in other projects without problems:
For writing a Byte I used: EEPROM_ByteWrite(someByte , 0x00,0x02); for reading a Byte I used: someByte = CY_GET_REG8(CYDEV_EE_BASE + 0x02);
That worked well and everything was good.
Now I tried to use the new API:
For writing a Byte I'm using: EEPROM_WriteByte(someByte ,3); for reading a Byte I'm using: someByte = EEPROM_ReadByte(3);
Sometimes this works, sometimes not...
Do I use the new EERPOM API correct? Is that correct to not use the CYDEV_EE_BASE anymore? By the way, I'm using also I2C in my Project, I have no problem with that until I'm using the EEPROM. Or are there any timing issues between I2C and EEPROM access?
thanks a lot
Show LessHello,
I am trying to debug my BLE module, but it doesn't start, it seems like its stuck in an infinite loop.
The code snippets ar attached.
The code is stuck between the for loop on line 329.
Could someone help please.
Thanks,
Shalin
Show LessHi,
We have a design using the SPI master (2.5v) and other IPs (ADC, LCD, shift regs...). When the whole design is put in hibernate the power consumption stays too high (16mA) even if peripheral sleep functions are called.
When the SPI master IP is removed, the power consumption in hibernate mode is ok (~50uA).
Is there any issues regarding the SPI IP in hibernate mode ?
Thanks in advance
Best regards
Nicolas
Show LessHello all,
I am trying to bootload an application using Bootload Host to a PSoC 5LP CY8CKIT-059, but it keeps giving the below error:
I tried to do it with the USB connection through KitProg and tried to connect an FTDI cable directly to the corresponding Rx, Tx ports, and nothing works.
Would really appreciate if you guys help and point out what I am missing.
Thank you in advance,
Kaan
Show LessTengo un problema con psoc 5 que conecta el puerto serie USB al scilab Agenda
Hello community,
My basic question is how to combine two projects. I found a project on the internet for a display module which is working fine for my purposes. Nevertheless it is rather complex. Now i want to use this project in my original project. So I am searching for a simple way to import the display project into my original project.
Any ideas?
Thanks in advance,
Alex
Show LessHello,
I hope i am right here with my posted topic. What i found so far in this forum told me that my following project should be feasible.
In short:
I get some data from a device which only can provide it on an USB 2.0 communication channel. But i need this data to be at the end of the system in an unidirectional stream which additionally will be manchester encoded before putting it into a transmitter unit.
Host USB 2.0 <-> USB 2.0 PSoC3/5 ->SPI -> XOR gate -> manchester encoded data
Is it possible to combine these interfaces in the pictured order? Of course the USB driver of my USB host and the PSoC should match. In combination with AN2281 and AN2358 for manchester encoding and decoding the SPI output, i should be able to get the desired communication. The received data rate from the host is about 2-5Mbit/s.
Thanks in advance for any helpful advice.
Stell
Show Less