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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
Some data packets are seemed to be missing in serial reception from Neurosky mindwave mobile sensor at 57600 baudrate. I don't know if it is due to ac... Show More
Anonymous
PSoC™ 5, 3 & 1
i want to do 6 channel clock output (60 deg phase shifted phase shifted fixed  frequency 100 Khz with 100nS Fix on time)    for this if i can make Jon... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello,    I'm debugging a odd little error on a sensor project I'm working on. My project is running current through external loads with IDACs, and ta... Show More
Anonymous
PSoC™ 5, 3 & 1
Hi,         I'm using the CY8C21534 and have a few questions about the tuning process of the capsense CSD user module. Can someone help me with these?... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello everyone,    I'm designing system conditioning for a strain gauge transducer, I want a gain of about 200. the transducer power (Excitation volta... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello, I am trying to create an accurate millisecond stopwatch which records the timing of external triggers. I would like to be able to record hours ... Show More
WiFl_1166056
PSoC™ 5, 3 & 1
I’m having trouble with the Timer 3.0 (16-bit UDB) for PSoC 5LP.    What is the intended function of the compare bit in the status register?    The da... Show More
cadi_1014291
PSoC™ 5, 3 & 1
Hi all, i'm trying to transfer content of an array (SRAM) to a ControlRegister via DMA CPU Request, i'm trying to transfer 1 element of the array per ... Show More
Anonymous
PSoC™ 5, 3 & 1
Hi, I'm designing a 'hardware only' 3 channel DAQ system using an Analog Mux, DelSig ADC, and DMA. The ADC is hardware triggered at a 500us rate, with... Show More
sccac_1236541
PSoC™ 5, 3 & 1
Hi all,         I've somewhat successfully integrated the emfile component into my project and exported my data to my SD card.  I am currently not mee... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.