PSoC™ 5, 3 & 1 Forum Discussions

Hi everyone, I am working on a project that needs to generate multiple sine waves at the same time to drive a tweeter. The background is that I would like to convert an image into sound waves. Each pixel is going to be designed a specific sine wave with its specific amplitude and frequency.If I would like to convert an image in 64x64 resolution, the amount of sine waves I need to generate is 4096. 

Here comes the question, I have looked up a technical document about waveform generation by using WaveDAC8 but the closet example project was actually adding two different sine waves together by using two DAC in parallel. I know its impossible to add thousands of sine waves by using thousands of DACs in PSoC 5 LP. Thus I looked into the limitation of WaveDAC and the result was that I could generate 4 waves at maximum at the same time. An application engineer suggested me to program an algorithm to add those thousands of sine waves together before feeding them into a DMA,then use the DMA channel to transfer the final result to a WaveDAC8.Is this feasible?

If it is feasible, can anyone help me further or share me related technical documents? I have no idea how to add those sine waves before feeding them into a DMA in coding and how can I set the WaveDAC by then. What I can do so far is creating a table of amplitudes and a table of frequencies that corresponding to image pixels through MATLAB coding.

Many thanks!

Lingo 

Hey Guy's

Is ther a example that mesures the distance whit a HC-SR04  and Psoc 1

Whit best regards Ben

I am using delta sigma adc of 18 bit resolution, I tried to convert the data into string format and print in serial. But did not get result.

This is my code: 

#include <project.h>
#include <stdio.h>
int main()
{
    CyGlobalIntEnable; /* Enable global interrupts. */
    int16 result=0;
    float result1 = 0u;
    char8 resultStr[16u];
    char *resultstr= NULL;
    /* Place your initialization/startup code here (e.g. MyInst_Start()) */
    PWM_Start();
    ADC_Start();
    PGA_Start();
    UART_Start();
    ADC_StartConvert();   
    PWM_WritePeriod(100);
    PWM_WriteCompare(50);
    
    for(;;)
    {
         if(ADC_IsEndConversion(ADC_RETURN_STATUS))
        {
       result=ADC_GetResult32();
 
       result1=ADC_CountsTo_Volts(result);
       CyDelay(3000);
     
       sprintf((char *)resultStr,"%+1.2f",1.2663);
 
      CyDelay(1000);

    UART_PutString(resultStr);
        }
    }
        /* Place your application code here. */
    
}

Hello everyone,

I recently downloaded the Bootloader Host application from the below link:

http://www.cypress.com/documentation/application-notes/an68272-psoc-3-psoc-4-and-psoc-5lp-uart-bootloader

The application uses a DVK(PSoC 5LP) as a bootloading device to connect to and bootload other PSoC devices. I was wondering if this operation is possible to implement on a single board by modifying the application.

For example can I download an arbitrary bootloadable.cyacdn file, parse it to a string image and bootload the same device from this string image? Basically can the device bootload itself with this Bootloader Host application?

Thank you in advance,
Kaan

IN PSOC 5 i want to store some data in eeprom using crc model .

Please suggest me how to use this CRC  model or internal crc of psoc

Hi Forum,

I am working on a project for which I just need to read 4 SAR ADC channels as quickly as possible while streaming the data back to a PC using bulk transfers with USBFS.

The problem I keep running into is that the maximum sampling frequency seems to be limited to ~30 kSPS per channel - for a total of 120 kSPS on all four channels. Whenever I try to go beyond that, my device is either dropping packets (IRQ controlled) or crashes the USBFS (DMA controlled). So I suspect I am probably missing something. The two strategies I have tried so far are outlined below:

1. IRQ based - Here, I use the conversion complete interrupt to write values and set a data-ready flag. I am polling in the main loop and every time a new sample is there, I initiate a DMA transfer to the USBFS component. This is working robustly, but breaks down at sample rates > 30 kSPS per channel (120 kSPS total). It seems like retrieving the values from the ADC final buffers can't happen fast enough - when fetching data is commented out, throughput on the USB bus goes up to >800 kB/s.

2. DMA based - In this case I tried to circumvent the data fetching problem by setting up DMA transfers triggers by the eoc signal. Here, 8 bytes (4 channels) get transferred to a buffer (64 bytes) upon end of each conversion. When 64 bytes are transferred this way, an IRQ is used to initiate another DMA transfer from the buffer to the USBFS component. This also works fine at lower conversion speeds, but upwards of ~30 kSPS, the PSoC seems to crash after a few seconds and there is no more USB data coming in to the PC.

What am I missing here? Is there another strategy people typically use to obtain the highest throughput for streaming ADC data via USBFS?

Any help or hints are appreciated!

Thanks,

Felix

I have a few questions I have the I2C EEPROM I am battling with. One of the specifics of this one the EEPROM will NAK all the write attempts after a large write has been completed previously. I am using function I2C_MasterWriteBuf to write the data. I do know the write attempt is being NAKed. However I2C_MasterWriteBuf  does not return I2C_MSTR_ERR_LB_NAK in that instance. The function returns zero. I went into the source for I2C_MasterWriteBuf and could not find anywhere where it would return a NAK related result. Is it supposed to return a I2C_MSTR_ERR_LB_NAK? Documentation certainly implies so. That would be handy feature.

Now for my application I do not want to place a fixed delay for EEPROM writes instead I want to keep trying to write until I get an ACK. Is there any way to do that besides manual start, send byte, send stop functions?