PSoC™ 5, 3 & 1 Forum Discussions
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Hi,
I made some general tests with I2C block transfer communication, and found that sometime the software became frozen (PSoC Creator 3.3 SP1 with I2C v3.50). After digging into details I realized, that I2C_INT.C defines the interrupt service routine (ISR), which contains few CYASSERT instructions, which are suspected to be responsible for the freeze (it is know that CYASSERT is compiled to 'halt' in 'Debug' compilation mode.) By using a PSoC 5LP development board give an easy possibility for detecting the CYASSERT case would happen, if a built in board LED is turned on in these cases. Furthermore as the development board has four LEDs, thus different LEDs can be used in the altogether 3 CYASSERT cases. The remaining 4th LED was just used an indication of I2C communication phase (turning on before I2C block transfer, and turning off after it).
After this making intensive test sometimes it was noticed, that the firmware halted, as one of the error LEDs and the 4th LED remained in turned on state. Indeed, quite an aggressive test was made, even the power from the I2C pullup resistors were removed for simulating faulty I2C devices, which easily caused the LEDs turning on.
But after all I do not know how to make "foolproof" I2C block transfer. I would like to have a solution, when anything "bad" happens on the I2C bus, the PSoC firmware detects it and it could continue its task. It is suspicious, that besides all of the CYASSERT cases there is a conditional compilation directive for handling a timeout, but I did not find a way to use the I2C "integrated" timer yet. The other possibility, if the original ISR is modified (that is at the moment what I am doing), and some recovery code is added to the error cases. And here I would add some indication in the returning status (I2C_state |= I2C_SM_MSTR_HALT|I2C_MSTAT_ERR_XFER;), which can be checked in the main loop.
What is the recommended way to implement a reliable I2C block transfer communication? How the "built in" timer can be used?
One more addition, that in the error cases maybe a non-blocking "I2C stop" must be added too, at least to bring out the I2C Master from undetermined state, and make it ready for the next operation, if the I2C bus becomes usable again.
Thanks,
Lajos
ps:
Here is the code part, which is derived from the generated I2C_INT.C (and of course further modified) I am referring to:
Original version:
#if(I2C_TIMEOUT_ENABLED)
/* Exit interrupt to take chance for timeout timer to handle this case */
I2C_DisableInt();
I2C_ClearPendingInt();
#else
/* Block execution flow: unexpected condition */
CYASSERT(0u != 0u);
#endif /* (I2C_TIMEOUT_ENABLED) */
LED supported debugging version:
#if(I2C_TIMEOUT_ENABLED)
/* Exit interrupt to take chance for timeout timer to handle this case */
I2C_DisableInt();
I2C_ClearPendingInt();
#else
/* Block execution flow: unexpected condition */
LED1(1);
CYASSERT(0u != 0u);
#endif /* (I2C_TIMEOUT_ENABLED) */
Improved version:
#if(I2C_TIMEOUT_ENABLED)
/* Exit interrupt to take chance for timeout timer to handle this case */
I2C_DisableInt();
I2C_ClearPendingInt();
#else
/* Block execution flow: unexpected condition */
LED1(1);
//CYASSERT(0u != 0u);
I2C_DisableInt();
I2C_ClearPendingInt();
I2C_state |= I2C_SM_MSTR_HALT|I2C_MSTAT_ERR_XFER;
#endif /* (I2C_TIMEOUT_ENABLED) */
I discovered, that I2C_TIMEOUT_ENABLED is defined in I2C.h, like this:
#define I2C_TIMEOUT_ENABLE (0u)
...
#define I2C_TIMEOUT_ENABLED (0u != I2C_TIMEOUT_ENABLE)
Hello,
I am trying to find an example of using PSOC 5 interfacing with an external EEPROM via I2C.
I have a Microchip Tech 24LC16B EEPROM I'd like to read and write to.
I found an old app note on this but only the PDF and no example code..
Any help would be appreciated.
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txdata = xx0000001111111111111111xxxxxxxx
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I was thinking to split these bits into "txdada_hi, txdada_middle, txdada_lo ". But i dont know how i can do this.
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Best Regards
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I am working a new design with two DACs (VDAC_1 and VDAC_2) . I attached some pictures describing the DAC configuration and PSOC system configuration. All the power for PSOC5 chip are 5V.
I am trying to configure the output to the maximun value of 4.080V but I only get 1.024V. The piece of code for set this value is:
VDAC_1_SetRange(VDAC_1_RANGE_4V);
VDAC_2_SetRange(VDAC_1_RANGE_4V);
VDAC_1_SetValue(0x0);
VDAC_2_SetValue(0xFF);
As it seems to be very symple according to the datasheet, I think I am missing something, can anyone tell me what else should I configure to get the output 4.080V?
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