PSoC™ 5, 3 & 1 Forum Discussions

hello all ,

i am trying to interface psoc 5 with a National Semiconductor's sensor,

This sensor works with the Microwire protocol

(Microwire often spelled μWire, is essentially a predecessor of SPI),

i know that in psoc 4 there is a built in block for the Microwire bus (inside the spi block with submode set to National Semiconductor),

but in psoc 5 inside the spi block there isn't such a feature ,

does anyone hes any experience working with this bus on PSOC5 ??

if there isn't a built in block in psoc5 how do you suggest i can interface with this sensor ?

thanks lampel  

Good afternoon. I'm facing a question about USBCOM (virtual serial over USB). My project has an interrupt driven data acquisition (with a message queue) and a USBCOM component to send the processed reads to the computer.

Everything works as expected but I have a doubt about interrupt priority. My 'input' PIN and all the USB interrupts have been assigned 7 as priority. Since my data is made of 'bursts' of packet, I thought that I should give my 'data capture' ISR a lower priority than USB (eg:6).

The queue should 'smooth' the peaks. What I find is that if I lower my ISR priority, USB seems to go wild, with the computer not responding to mouse anymore.

My ISR looks like this (DataReady is the interrupt pin):

CY_ISR(ByteArrivedISR)

{  

    EventRegister_InterruptDisable();

    DataReady_Disable();

... write input to queue

    DataReady_ClearPending();

    EventRegister_InterruptEnable();

    DataReady_Enable();

}

My main program writes to serial with a loop of

                 USBCOM_PutString(lineStr);

                while (0u == USBCOM_CDCIsReady());    

This is my first PSOC project and I must say that I'm impressed with the possibilities of the hardware and PSOC Creator (it REALLY rocks!!!).

More questions:

-is there a way to debug only 'main' program and not ISR ? Every step that I do moves to some interrupt handling routine for USB.

-is there some 'official' guideline to promote PSOC DIY opensource applications (logos/links to web hosting etc)

Hello everyone,

Iam currently using a FreeSoC2 Dev board with a CY8C5888AXI-LP096 chip. The chip can handle 80MHz from the cypress website.

Currently i see in PSoC Creator 4.1 a master clock of 24MHz. The FreeSoC2 uses an internal oscylator if iam right and has a optional small and large crystal footprint to solder external crystals on it.

Is it possible to bring the FreeSoC2 CY8C5888AXI-LP096 master clock to 80MHz and how do i do that?

Best Regards, Daan Brinkers

Hi There,

I am reviewing a CY8C2123 design. There appears to be a latchup problem. There are 2 issues I can see;

(1) When programming, there is an edge connector on the PCB to plug in a programmer. This edge connector connects power, ground and I2C lines and programs the device. The ground pin on this port is not longer than the others so ground may not be connected first. If the programmer is plugged in and powered up, can this cause latchup?

(2) Once the programmer is removed, the pullups for the I2C bus are removed (there are none on the board). When the device powers up in operational mode, there are no pullups on the data or clock lines. can this cause problems?

Any help appreciated.

Hi,

I'm deep into the UDB and need to create a component with a dynamic PI aimed at PSoC5LP. I am creating the guts of the design in verilog by hand, but am using the Datapath Config Tool to setup the ALU instructions.

When creating the component I target the PSoC5LP rather than crating a generic design.

As a result the PI DYN bit in CFG15-14 is greyed out and I cannot invoke it.

Reading the following post:

Datapath ALU input from Parallel Input (not A0 or A1)

I see that there was an issue with PSoC5 that means dynamic PI does not work, but later comments suggest this is fixed in PSoC5LP. So I am presuming that the datapath tool is incorrectly under the impression that I want to use PSoC5 and not PSoC5LP.

I have some 'defines in my code that I assume defines which devices I am targetting:

'define CYDEV_CHIP_MEMBER_5A 3

'define CYDEV_CHIP_MEMBER_5B 2

'define CYDEV_CHIP_MEMBER_USED 2

More searching suggests that CYDEV_CHIP_MEMBER_5A = PSoC5 and CYDEV_CHIP_MEMBER_5B is PSoC5LP, and so it implies that the correct device is selected, but I can't find a description of how these should be defined, and random tweaking has not helped the situation.

Any guidance on how to get DYN PI for PSoC5LP enabled or pointers to the correct documentation would be much appreciated.

Regards

Zig

Hello Team,

          For one of our project, we are using Cy8ckit-001 EVK Board and CY8C5868-LP035 module. We are using PSoC creator for generating API and developing firmware. While configuring CAN IP, we are confused with timing tab,  which option to select for settings(BRP/Tseg1/Tseg2/SJW) for better performance. How will these settings affect CAN performance?

           Please help us with selecting the good option which will give better CAN performance.

Thanks and Regards,

Abhishek Naik.