PSoC™ 5, 3 & 1 Forum Discussions
Hi,
I am new to cypress psoc 1 and using controller CY8C28452.
I want to take input of multiple channel of adc(P0.4 & P0.5 & P0.1 & P0.3).
I can found tutorial and example for read adc from single channel but can not found multiple found tutorial for multiple channel.
Please help me to read multiple adc channel on psoc1.
Thanks,
JP
Show Lessthis is my project
Good morning,
this case is connected with case number 00410446.
You had advised me to redesign the PCB of the card, as the pressure sensors did not work, but unfortunately, marking your directions, we got a bad result.
I send you, like the other time, the Gerber and the PSoC Creator project we are working with.
Could you tell me how we can solve the problem?
We have to use proximity sensors.
In the previous case, we were talking with Ganesh.
Thank you
Alessio
Show LessI am trying to use TrimMargin component to change the voltage of a power regulator. The code example disables the rails when it is disabled, which turns off the regulator. I want to use Trim Margin in a live system, and be able to turn on/off the TrimMargin device without impacting the voltage rails. But I can't find a way to turn it on or off without disrupting the regulator feedback, as the ramp of the PWM signals takes a long time and wrecks my regulator feedback voltage during that time.
I also have a problem getting some voltage ranges to settle. Some voltage ranges work, but some continually jump around with a step function of 100mV, even though the calculator within the tool indicates the 10mV ripple will be achievable.
Disappointed that there is only one example I can find anywhere.
Show LessHi all, I'm looking for some clarification on the readings I'm getting from the DelSig ADC component on a CY8CKIT-050.
I have attached the project, there's some extra stuff going on with me experimenting with DMA and a bootloader, but the ADC is simply reading from the onboard pot on the test kit in single ended mode. Input range is set to VSSA to VDDA and the buffer mode is "Bypass Buffer" but the problem exists on any of the buffer modes.
What I'm finding is that when I hit the low end of the pot, 0V, my ADC value is appearing to underflow(?). 0V input results in values close to 0xFFFF. The voltage is not going negative, at least according to my multi-meter measurement. Can someone explain exactly why this is occurring, and what I would have to do to remedy the issue so 0V input results in 0x0000?
Thanks in advance.
Show LessHello
I'm working on programming PSOC via USB.
I found in the site Windows-based bootloader host program.
but, I'm working on Linux.
Do you have Linux-based bootloader host program?
Thanks
And a good week
Orit
Show LessHello
I have dev-boart CY8CKIT-059 PSoC® 5LP and try run FreeRTOS v 10.0.1
The project is bulded successfully, however, the LED don't blink.
My application is:
void vTask1( void *pvParameters )
{
while ( 1 )
{
LED_Write(~LED_Read()); // LED - Digital Output Pin v2.20, mapped to port P2.1
vTaskDelay(1000 / portTICK_PERIOD_MS); // also try change value "1000" for other value
}
vTaskDelete( NULL );
}
int main(void)
{
CyGlobalIntEnable; /* Enable global interrupts. */
/* Place your initialization/startup code here (e.g. MyInst_Start()) */
BaseType_t xReturned;
LED_Write(0); // after uploading the programm - LED blink
CyDelay(2000);
LED_Write(1);
CyDelay(2000);
LED_Write(0);
CyDelay(2000);
xReturned = xTaskCreate(vTask1, (signed char *) "Task1", configMINIMAL_STACK_SIZE, NULL, 1, NULL );
if( xReturned == pdPASS )
{
for (int i=0; i<5; i++)
{
LED_Write(~LED_Read()); //here it also blink
CyDelay(500);
}
LED_Write(0);
}
vTaskStartScheduler(); // after that - LED don't blink
LED_Write(1);
for (;;);
}
The "FreeRTOSConfig.h" I get from "..\FreeRTOS\Demo\CORTEX_CY8C5588_PSoC_Creator_GCC\FreeRTOS_Demo.cydsn\"
and change only
#define configCHECK_FOR_STACK_OVERFLOW value "2" -> value "0"
/#define configUSE_MALLOC_FAILED_HOOK value "1" -> value "0"
During the degug - I do "step into " "vTaskStartScheduler", the the xTaskCreate(prvIdleTask, ...) has done successfully and when I reach "xPortStartScheduler" - nothing happen
Thank you
Also, the basic example I used:
Air Supply Lab - Lesson 11: Real-Time OS FreeRTOS
Show LessEven if I change the period to 2msec ,the signal is the same...
See: https://sourceforge.net/projects/mecrisp/files/Cypress/
The porting for the PSoC 6 is also planned.
With this FORTH-pagage it is possible to test all C-applications interactively without debugger. The Kernel have integrated an interpreter and compiler.
The Compiler is extendabel in FORTH itself.
If you would like to know more about FORTH, you will find the classic Starting-FORTH and Thinking-FORTH by Leo Brodie:
http://thinking-forth.sourceforge.net/
The Definition of ANS FORTH you can find here: http://lars.nocrew.org/dpans/dpans.htm
If you want to know more about Mecrisp-Stellaris you are right here:
https://www.forth-ev.de/filemgmt_data/files/4d2015-arm.pdf
Have fun
Klaus
Show LessHello,
I am having a 14 bit data stream from ADC and I want to use the DFB for FIR and IIR filters.
How do I find out what is the maximum data rate possible for using the DFB. In the technical reference manual @ pg 294, it is mentioned as
"A one 24-bit word Staging register is used for a sample rate at or below 1 Msps and guaranteed bus latency lower than the sample period." However in the creator it is not reporting any error for ADC sampling rate of 10MSPS.
In short please advise as to how do I find out information regarding the throughput for DFB.
Thank you in advance
Show Less