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PSoC™ 5, 3 & 1 Forum Discussions

Anonymous
PSoC™ 5, 3 & 1
Understand when using a Bootloadable component we cannot do debug (tabs grayed out). Simple fix is disable component.Is there a way to include a boole... Show More
YaIs_283501
PSoC™ 5, 3 & 1
If you use RTOS (toppers asp), USB-UART configuration will not be finished. Specifically, while (! USBUART - 1 _ GetConfiguration ()); does not satisf... Show More
prbh_3338016
PSoC™ 5, 3 & 1
Cypress is little bit confusing. Like other microcontrollers here I dont find easy selector tool for choosing micro controller.  I need to design univ... Show More
Anonymous
PSoC™ 5, 3 & 1
In Datasheet it says, Four programmable analog blocks, to create:• Programmable gain amplifier (PGA)• Transimpedance amplifier (TIA)• Mixer• Sample a... Show More
Anonymous
PSoC™ 5, 3 & 1
Hey, Cypress , I met a serious problem about  the chip CY8C9560A-24AXI ,When I tried to access the CY8C9560A-24AXI through my FPGA , The I2C  clock si... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello everyone,I'm trying to create a custom bootloader for CY8C58LP using the PSOC Creator.Both the bootloader and the application work fine individu... Show More
HuEl_264296
PSoC™ 5, 3 & 1
Hi,Is it possible for a PSoC5 to appear to a USB host as a USB Camera?If I attach a simple camera chip to a PSoC5, I can easily read images from it.  ... Show More
joli_601446
PSoC™ 5, 3 & 1
Hello, I am planning on using the JTAG IF on the PSOC5 to program the device. I would like to ask the forum members if I can it connected properly in ... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello there,I am having PSOCEVAL 1 CY3210 Kit with me. I need to measure the max and min voltages for the ac input signal that i am giving. The signal... Show More
UrZn_3268396
PSoC™ 5, 3 & 1
Hello, I trying to implement bootloader in my project using the UART component. In did a few projects with RS232 and i2c and all worked OK, I guess it... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.