PSoC™ 5, 3 & 1 Forum Discussions

Hey there,

I am working with PSoC 5LP and interrupts. For my own application I would like to do the following case:

INT A has lower priority than INT B

1. INT B is asserted when interrupt A is being executed.
2. INT A is stopped at the point of execution.
3. The details of INT A are pushed to the stack, and INT B begins to execute.
4. After execution of INT B I want to break INT A and return to main()

So, my question is:

Can I break an interrupt clearing some register and return to main() instead of return to execute the pending interrupt?  

I have used clear_pending function but the result is the same. My program always return to the lower priority interrupt once the upper interrupt has finished.

I hope that some one can help me with the problem.

Thanks and regards !!!

I'm trying to find a confuguration where I can run the CPU at maximum speed (80MHz on CY8C5888AXI-LP096 in this case) and also using the SAR_SEQ component.

Setting the Master clock to 80MHz (with XTAL) will result in an ADC clock > 18MHz = error

I tried using an 18MHz XTAL (Master clock 80MHz) = "Error in component: ADC_SAR_Seq_1_SAR. Divider of SAR ADC clock must be 2 or greater when source clock frequency is between 15 MHz and 40 MHz.", setting the Master clock to 72MHz solves this error so the error test is porabably some indirect error.

Does anyone have a working clock configuration to acheive this?

Thanks for any comment on this.

Jacob

CYC8KIT-030 not recognized/port not found  (tried 10 sec reset dodge no result) in Creator??

Hello

Returned PSOC early adopter starting again!!

Bought CYCKIT-030 and running Creator 4.2

Tried 'worked example' intensityLED.cydsn to update myself.

Creator 4.2 cannot find the development kit.

Tried 10 second reset dodge but no success.

Thanks Ray.

We are considering  Seg LCD component of PSoC5LP.
Becouse the segment LCD of PSoC5LP supports 768 pixels.

At that time I think we need to use 16 commons.

Probably the LCD may be correctly displayed from the front

However, is there a possibility that contrast can not be secured sufficiently when looking at the LCD obliquely?

It becomes difficult to distinguish between ON and OFF segments,
We are concerned about the problem that users mistakenly recognize.

If you have the maximum number of recommended commons, could you please provide it to us?.

Regards,

Hi

I got a UART transmission block working, sending 4 bytes at a time but the logic i'm using is actuallly not making a lot of sense to me, even though it works.

I was checking if the transmission status was FIFO not full, but what really makes sense is to check if the FIFO is empty so I can immediatly load it with the 4 bytes to send. When I do this, however, it never goes into the if, it's always false even if right before checking it I place the clearTXBuffer and I don't understand why.

Does anyone have any idea? Am I understanding the functioning wrong? I've read the datasheet some 3 or 4 times and this is what I could understand from it.

Thanks.

Dear Developers,

I am using ds18b20 for reading temperature  using the library shared on psoc community. I am able to successfully interface the ds18b20 (dallas) ic . But comparing the result

i found that my ds18b20 is giving 7-8 degress increased drift in the reading. I thought it was sensor fault so i retested the sensor on the arduino where is gives proper reading. I have RTD Pt100 sensor using which i compared ds18b20 is giving proper result on arduino but not on psoc5lp ( kit 59).

This below library is shared in psoc community.

Hello. I'm having a problem with a very simple pair of DMA channels.  Call them DMA1 and DMA2.  DMA1 was created first to write the output of an ADC channel to memory, and works fine.  Later I added DMA2 and set it up exactly the same.  However DMA2 would not work, no errors but the destination memory location always contained zero.

I checked the setups carefully.  The channel number for DMA1 was 0 and 1 for DMA1.  The TD handle for DMA1 is 127 and 126 for DMA2.  There are no errors returned from any of the setup steps.  I eventually used the wizard to create code for the second DMA and it was identical to what I already had.  I had thought maybe the second channel needed some different values somewhere in the setup, but it appears not.  Both ADC's and DMA;s  and TD's have different names and memory locations.

Finally in desperation I commented out all of the code for DMA1, and DMA2 started working.  Experimenting a bit I found that as long as I did not make the ADCStartConvert call for DMA1, then DMA2 works.  I tried reversing the order so that the ADCStartConvert for DMA1 is done second, but still DMA2 is the one that fails.

So I am very unclear as to what I could be doing wrong.  I am using creator version 4.2 with a PSOC5.  Below is the setup code for both DMA's.

Thanks for any help.

Russ

// Defines for TempDma
#define TempDma_BYTES_PER_BURST 2
#define TempDma_REQUEST_PER_BURST 1
#define TempDma_SRC_BASE (CYDEV_PERIPH_BASE)
#define TempDma_DST_BASE (CYDEV_SRAM_BASE)

// Variable declarations for TempDma - These are defined globally elsewhere
// uint8 TempDma_Chan;
// uint8 TempDma_TD[1];

// DMA Configuration for TempDma
TempDma_Chan = TempDma_DmaInitialize (TempDma_BYTES_PER_BURST, TempDma_REQUEST_PER_BURST,
  HI16 (TempDma_SRC_BASE), HI16 (TempDma_DST_BASE));
TempDma_TD [0] = CyDmaTdAllocate ();
CyDmaTdSetConfiguration (TempDma_TD [0], 2, TempDma_TD [0], TD_AUTO_EXEC_NEXT);
CyDmaTdSetAddress (TempDma_TD [0], LO16 ((uint32) TempAdc_SAR_WRK0_PTR), LO16 ((uint32) &Td.TempResult));
CyDmaChSetInitialTd (TempDma_Chan, TempDma_TD [0]);
CyDmaChEnable (TempDma_Chan, 1);

TempAdc_Start ();
TempAdc_StartConvert ();

// Defines for UserAttnDma
#define UserAttnDma_BYTES_PER_BURST 2
#define UserAttnDma_REQUEST_PER_BURST 1
#define UserAttnDma_SRC_BASE (CYDEV_PERIPH_BASE)
#define UserAttnDma_DST_BASE (CYDEV_SRAM_BASE)

// Variable declarations for UserAttnDma - These are defined globally elsewhere
// uint8 UserAttnDma_Chan;
// uint8 UserAttnDma_TD[1];

// DMA Configuration for TempDma
UserAttnDma_Chan = UserAttnDma_DmaInitialize (UserAttnDma_BYTES_PER_BURST, UserAttnDma_REQUEST_PER_BURST,
  HI16 (UserAttnDma_SRC_BASE), HI16 (UserAttnDma_DST_BASE));
UserAttnDma_TD [0] = CyDmaTdAllocate ();
CyDmaTdSetConfiguration (UserAttnDma_TD [0], 2, UserAttnDma_TD [0], TD_AUTO_EXEC_NEXT);
CyDmaTdSetAddress (UserAttnDma_TD [0], LO16 ((uint32) UaAdc_SAR_WRK0_PTR), LO16 ((uint32) &Td.UserAttnResult));
CyDmaChSetInitialTd (UserAttnDma_Chan, UserAttnDma_TD [0]);
CyDmaChEnable (UserAttnDma_Chan, 1);

UaAdc_Start ();
UaAdc_StartConvert ();

hiii

i have interfaced  CY8CKIT-050 kit and W25Q128Fv flash chip using http://www.cypress.com/documentation/code-examples/ce204087-interfacing-spi-nvram-psoc-35

it works good upto 350kHz frequency but it doesnt work more than that frequency, in the datasheet they have mentioned that it works upto 4MHz

what might the reason behind this?

how can i solve this?

Hi,

How should I properly secure my code to prevent it from cloning ext. Is it sufficient to do the following:

- set flash security to "W" for bootloader portion
- set flash security to R for all other, non-bootloader portion
- Debug Select = GPIO, Enable Device Protection = On
- Miniprog3: Enable Chip Lock in the programmer options and program the device

Are those steps sufficient or it's still possible the read the flash with debugger...?

Do I need to program Write Once NV Latch to be 100% sure that code is secured?

Regards,

Tomi