PSoC™ 5, 3 & 1 Forum Discussions

After changing to the CyUSB.sys driver some wierd side effects seem to be occurring.

1. In the Windows device manager, when I look at the driver, its name looks like:

   %VID_04b4&PID_1004.DeviceDesc%

2. In USB Control Center I see a new entry:  KitBridge

which looks nothing like the documentation in AN56377. The only way I can Identify it as the likely board is that

the serial number matches. The PID is not what I was expecting. The configuration of the board does not match

what was setup in AN56377. If I open USBview or Windows device manager and look at the PID, it is what I

expected (ie. PID is 0003).

3. The project in PSOC Creator 4.1 builds but the Debug -> Select Target and program

shows zero valid targets even with "Show all targets" selected.

Any ideas what I am doing wrong heard ?

I need to design a closed-loop control system but i have this problem:

Every 10 samples of ADC delta sigma this noise contaminates the signal.

Does anyone know how to solve this problem?

Samlple Rate: 1 kHz.

Clock Source: External

Thanks for Listening

Hi,

I have CY8CKIT-059 Prototyping kit and I downloaded CE210741 example code for evaluation of UART component. As is, the generated code does not run as stand alone application. It does not run without the USB connection to KitProg and also does not run without the KitProg attached to the target board. It works though with the USB connection to the kit but it is not what what I need. I need to take it away from the computer, attach it to a serial device working as terminal and demonstrate it works like "Blinky" the application already installed when I purchased the kit.

So I have a simple question: UART Component - Can it be used in stand-alone applications?

Looking forward to a dialog.

Best regards.

Hello,

We're in the prototype phase and have enough units that a bootloader has become necessary.
My starting place would be to get the AN60317 working but I'm having trouble even with that.

I'm working remote but I have 2 PSOC5 boards.  One is on a CY8CKIT-050 dev kit, the other is a custom board with similar circuitry.  Both of these boards have an I2C connection with each-other and to a Raspberry Pi (which has integrated pull-up resistors).  SCL is P12[4], SDA is P12[5].  I know the I2C connection is physically OK because If I put special projects on each Cypress board to give them unique slave addresses I can see them both from the Raspberry Pi.

The problem seems to be something with the Examples in AN60317, or with the way I've tried to convert or configure them.  I needed to modify the bootloader host project so to convert it from PSOC3 to PSOC5.  I had to upgrade both projects to a newer version of PSOC Creator.  I also needed to change the pins associated with the EZ-I2C device.

The bootloader host eval board simply says "Bootloading..."  on its LCD.

I've modified the bootloader host application to add debug code in an attempts to figure out where it is getting stuck.
This is what I've learned:
    In cybtldr_api.c is a function "CyBtldr_TransferData"

    The last line of code executed by this function is "int err = g_comm->WriteData(inBuf, inSize);"

    I know this because I print a message to the LCD immediately prior to this line and immediately after but I only see the first message.

The bootloader and bootloader applications I am trying to use are both attached to this email.

Why is the bootloader host hanging?

What additional steps do I need to take to continue troubleshoot this issue?

Hi, I have a problem during the Linking process.

I opened a new project with CY8C21434B and I placed the unit SmartSense to implement 23 button in smartsens technology . I followed the first example in datasheet (Code Sample) to implement the firmware.

When I tried to compile the project a link error occurred (RAM not enough):

" ...   

!E <library>(1993): {linker} Cannot allocate space for 46 bytes for 'ram0' area

!E <library>(1993): {linker} Cannot allocate space for 23 bytes for 'SmartSense_ramBtnFThreshold' area

!E <library>(1993): {linker} Cannot allocate space for 23 bytes for 'SmartSense_ramSnSSig' area

!E <library>(1993): {linker} Cannot allocate space for 72 bytes for 'SmartSense_ramSnsParam' area

... "

I tried to enable the parameters of the compiler like code compression, enable paging and stack area on page 1, to get more RAM but is not enough yet.

It seems that up to 16 buttons there isn't a problems. From 17 buttons onwards it start the problems.

Project parameters:

• PSoC Designer 5.3
• PSoC  CY8C21434B
• Unit SmartSense (Ver.1.50; Sensor Autoreset: enable;  Threshold Setting Mode: Automatic)
• Global Resurce: Vcc:3,3V;  SysClk: 24MHz;  CPU_Clock = 12MHz;
• Compiler Parameters: Enable paging and Stack offset C8; Code Compression all flags.

Is it possible that CY8C21434B don't have enough RAM to implement 23 button SmartSense?

Hi I am working with PSoC 5 development board 059, I am trying to have an UART or more that are capable of switching their baud rate dynamically.

My master clock is set to 24 MHz, if I divide the master clock by 96, i get the 31250 baud rate, but to get 115200 it is not an even clock division -> 24 MHz / (115200 *8) =

26.041. So if I set the clock divider to 26 this would mean an overall error of 0.16% (Error/RealValue)(0.041 / 26.041) I might think this is enough, but I don't know.

Does anybody knows which is the accepted clock error on UART??

Thanks in advance, José Manuel Romo

Edit: I tested, 115200 works, but does any body knows which is the overall error accepted for clock UART devices?

Hi,

I am a software engineer in Shenzhen.

I am designing a product that uses the CY8CKIT-033A development board.

However, CY8CKIT-033A only supports a maximum sample rate of 48k. How can I increase the sample rate to 96k?

There is another question, how do I implement mono?

I just want to implement a mono product with a sampling rate of 96k.And，it‘’s audio-in only。

BR.

Shide Lu