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PSoC™ 5, 3 & 1 Forum Discussions

tayoc_301426
PSoC™ 5, 3 & 1
A binary data reception interrupt program is being created using CY8CKIT - 059.The communication conditions are 19,200 bps DataBit = 8 Parity = non st... Show More
Mrinal
PSoC™ 5, 3 & 1
Hi!Is there a way to change the PWM compare value in PSOC-5LP using a hardware event? I mean a feature similar to PSOC-4, where compare buffer values ... Show More
rasec_2385561
PSoC™ 5, 3 & 1
freertos
solved msg Solved
Is there an application note on implementing freertos on PSOC 5 ? I have a CY8CKIT-059 PSOC 5LP Prototyping kit. Show More
YaIs_283501
PSoC™ 5, 3 & 1
Hello.I created a multi-application project file but I do not know how to switch applications using Bootloadable_SetActiveApplication. Looking at Boot... Show More
KaAs_973901
PSoC™ 5, 3 & 1
Hello, I have attached a project where I am interfacing with an SI 7023 https://www.silabs.com/documents/public/data-sheets/Si7023-A20.pdf humidity/te... Show More
Anonymous
PSoC™ 5, 3 & 1
Hello,I am new to the cypress. I am using cypress creator. I am successfully blink LED 3 using p6[2] pin and LED 4 using p6[3] pin on psoc 3 kit. Now ... Show More
Anonymous
PSoC™ 5, 3 & 1
I have a question about how to adjust the ADC.what should the setting be if you have to measure asignal on an input that has a value between 3 and 4 v... Show More
Anonymous
PSoC™ 5, 3 & 1
 Hi     Today i connected to use char LCD (16*2 HD44780 )  with my FreeSoC,But nothing works,    I connected my    RS -pin to P5.0    R/W- P5.1    E-P... Show More
brandiware
PSoC™ 5, 3 & 1
Hi CY community,    I have a fairly large project containing multiple UARTS which I read using interrupts.    To optimize memory usage of all differen... Show More
david-given
PSoC™ 5, 3 & 1
I am a USB device. My host is sending me a large amount of data. But I've read everything I need, so I need to tell it to stop. How?Simply disabling t... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.