PSoC™ 5, 3 & 1 Forum Discussions
Hi All,
As in the attached code, I am trying to measure Analog signals from two GPIO pins of CY8ckit-059 kit. And I am using a software multiplexer and Delta sigma ADC to convert the analog signals to digital.(design is attached for more info)
Issue I am facing is signal given to first pin is observed in digital output of second pin as well.
i.e. Whenever I am decreasing analog signals to a first pin of board (at channel -1 of multiplexer) I am getting similar decrease in second pin of board (at channel-2 of multiplexer) as well (as in the attached picture).
Any help is really appreciated.
Thank you so much in advance.
Show LessDear All,
I am using an ADC SAR with the A_Mux. Out of the microcontroller I have an Op-Amp which is connected to the Analog input pin. Due to the Low pass filter I need to calculate cut off frequency which can be affected by the sampling cap of ADC SAR (R40 and C26). It is necessary to know how much cap inside of ADC_SAR and the current limitation do it has on Analog input?!
I could not find what is the value of Cap inside of ADC SAR unfortunately. It is not mentioned in the Datasheet. I will be thankful if any body can help me in this case?
Thank you for your attention.
Best regards,
MoRo
Show LessHi All,
I need to be able to program a hex file to the PSoC5LP on my board over the SWD debugger port.
1. Does anyone know if the Cypress Programmer supports the PSoC5LP family?
2. If not, is there a tool that can do this? I need to provide my Production team a means of programming a hex file without requiring a full project with source code.
Thanks!
Show Less
Try to use my SWD programmer, that is working for ARM processors, for a CY8C3244 (PSoC_3).
I use XRES followed by >68usec CLK, followed by Sending the Port Acquire key.
But I never get a valid ACK (3b'001) , only 3b'111.
Show LessSome users would like to get a historical version of PSoC Creator for some specific silicon(s), for example PSoC3 ES2.
PSoC Creator 2.0 is the final released version supporting PSoC3 ES2. If you can't find the download link, please try the following one:
https://drive.google.com/file/d/1CnNmxNdJj1-KjQzxBNk82Yp0PYz27KLW/view?usp=share_link
Show LessHi everyone,
I would like to ask a question about SPI Slave functionality in PSoC5. I simulated SPIS as an E2prom with PSoC5 to send a buffer of data, the interrupt code like E2prom to respond to Master after receiving two words like 0x0003 (read buffer) and the next word refers to the starting point of reading buffer. (eg pointer starts at 0x0080). Then like reading page structure in E2prom by keeping SS low and sending dummy words from master that I expected to send response from slave one by one. It works fine when the master uses SCLK at 1MHz or less. But the problem occurs when I configure master SCLK more than 1MHz. Could you guide me how I can increase the interrupt speed and responsibility on the slave side because above 1 MHz it loses the first dummy word and I don't know why it happens?
uint8 spi_flag=0;
uint16 reg_ptr=0;
CY_ISR(isr_spis_rx_handler)
{
uint16 r_data=0;
r_data= SPIS_ReadRxData();
switch (spi_flag)
{
case 0:
{
if(r_data == 0x0003) spi_flag=1;
break;
}
case 1:
{
reg_ptr= r_data;
spi_flag=2;
break;
}
}
SPIS_WriteTxData(Buffer[reg_ptr++]);
}
Responsibility on 1Mhz works fine. it start immediately after receiving address point of reading.
With SCLK upper than1Mhz for instance in 2Mhz it lost the first dummy word. I need to improve the performance of Salve in its interrupt.
I will be thankful if you could guide me to solve this issue?
Best regards,
Mohammad
Show Less
A central page / link for :
1) Validated community components
2) 100 projects 100 days PSOC 4
3) 100 projects 100 days BLE
4) Code examples PSOC 4, 5LP, 6
5) Roadmaps for 4, 5LP, 6
6) Probably asking too much but searchable online or spreadsheet all app notes and description,
by PSOC family, and title.
7) A grouped link for each series of videos, and a subsequent list link for each group
When I refer a potential candidate to consider PSOC I try to resurrect these links, not always successful.
A page reviewed quarterly for broken links ?
Regards, Dana.
Show LessDear community, my name is Emanuel Dri. I did a PhD on testing and diagnosing strategies for SC filters in PSoC1.
In the following links you'll find the full read access to these articles. Also, soon I'll be sharing with you a software repository, containing the PSoC1 firmware and matlab functions that were, developed to execute the test and diagnosis procedures.
- (2020). A low - cost test stategy based on transient response method for embedded reconfigurable filters (see the file attached).
- (2021). Fault detection in reconfigurable switched - capacitor filters using transient analysis and dynamic time warping.
- (2022). A Built in Self Test for Analog Reconfigurable Filters Implemented in a Mixed - Signal Configurable Processor (see the file attached).
- (2022). Soft Fault Diagnosis in Embedded Switched - Capacitor Filters
I'll be glad to answer any question you may have
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