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PSoC™ 5, 3 & 1 Forum Discussions

josc_1234441
PSoC™ 5, 3 & 1
In the application note AN52705, Example 5 shows how two separate buffers can be used. I would like to implemented a ping-pong DMA for the SAR ADC but... Show More
chzhc_4111666
PSoC™ 5, 3 & 1
Dear friends,I have spent quite sometime reading through the user guides. Probably I can get some information more efficiently here.Currently I am usi... Show More
chzhc_4111666
PSoC™ 5, 3 & 1
I was thinking of some customization required or the hardware optimization.Below is something I want:- PC to send 32 bytes of data through USB to CY8C... Show More
chsec_4111641
PSoC™ 5, 3 & 1
I'd like to use a timer to measure an interval in microseconds (as the interval would be less than 1ms). Is there any way to do this? I'm sorry if thi... Show More
shchc_3520151
PSoC™ 5, 3 & 1
Dear sir,We are using CY8C5666AXI-LP004 series cypess controller.we are facing th issue with frequent reset of controller.we are going to implement po... Show More
damoc_1344541
PSoC™ 5, 3 & 1
I was developing with Creator 3.0, but when I have migrated to 4.2 I can't select the option GPIO for the Debug Select at the system options.@ Show More
tazhc_4089936
PSoC™ 5, 3 & 1
After line 205 i was trying to trigger ultrasonic transmitter and resetting the timer by setting the trigger high , afterwards i would stop the transm... Show More
user_3775416
PSoC™ 5, 3 & 1
Hi everyone,I have a problem with CY8CKIT-050 PSoC5LP. When I tried the examples with Mixer, it builds and works perfectly, until I connect the wrong ... Show More
DeSi_1418406
PSoC™ 5, 3 & 1
Hello,I have two project codes, one based on the CY8C526LTI chip and the other on the CY8C5888AXQ chip.I am using the miniprog 3 kit in j-tag mode to ... Show More
abtac_4079016
PSoC™ 5, 3 & 1
Hi, I am a new user for PSOC 5LP, I am wondering if there is any advise to start over with, as what is the best kit for CY8C5287AXI-LP095 and STEP MOT... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.