PSoC 5, 3 & 1 MCU

Hello

I have additional questions about this thread.

It would be very helpful if you could answer by 5/10.

There was a reply that you should develop using the latest version, but how should I migrate?

An error occurs when trying to open a .soc file created with Ver4.4 with Ver5.4.

 

Can it be solved on the assumption that the file created with Ver4.4 is used?

Best Regards

Hayto

 

 

 

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I am using a PSOC 5 (CY8CKIT-059) as a SPI slave in a project. I am trying put a status byte in the slave SPI tx buffer to serve as the default data read by the master when there is no data to transmit from the slave.  A ready byte when the slave is not processing, a busy byte when it is (or actual data from the slave).
The psoc's rx buffer is handled via dma. When the dma irq triggers for the single command byte, it clears the tx buffer (hardware), and places the busy byte in the tx buffer while it figures out what to do with the command received in the main loop. When it done executing the command, it clears the tx fifo once again and places the ready byte in the tx buffer. The problem I am running into is that at higher spi speeds (200khz in this case), the ready byte does not appear to be placed in the tx fifo. Instead, the busy byte is always returned. At lower speeds, it works as expected. I have included a bare-bones project showing the problem. Single bytes come in from the master at approx a 1 sec interval so there should not be a timing problem replacing the busy byte with the ready byte in the tx buffer. Nevertheless, the response received by the master will change based on the bus speed (at speeds around 190000 and higher, the slave will always respond with busy). Any idea what is going on here?

 

 

 

#define    PSPI_READY      0xAD
#define    PSPI_BUSY       0xAA

static uint8_t _PSPI_DMA_TD = 0x00;
static uint8_t _PSPI_DMA_Channel = 0x00;

volatile uint16 _PSPICMDFlags = 0x00;
volatile uint8_t _PSPICurCMD = 0x00;
uint8_t _PSPIInputBuffer[PSPI_BUF_SIZE] = {0};

volatile static uint32_t _PSPIRecvCnt = 0;

void Init_PSPIDMA(void) {
    
    // we are going to grab 1 byte from the SPI at a time
    _PSPI_DMA_Channel = PSPI_DMA_DmaInitialize(1,1, HI16((uint32)PSPI_RXDATA_PTR), HI16((uint32)(&_PSPIInputBuffer[0])) );
     
    /* Allocate TD - _PSPI_DMA_TD */
    _PSPI_DMA_TD = CyDmaTdAllocate();    
    
    /* Set the source of TD_rx as SPIS_RXDATA_PTR Address and the destination SPI slave Rx Buffer */	
    CyDmaTdSetAddress(_PSPI_DMA_TD, LO16(((uint32)PSPI_RXDATA_PTR)), LO16(((uint32)&_PSPIInputBuffer[0])));  

    // Set _PSPI_DMA_TD as the initial TD associated with _PSPI_DMA_Channdel
    CyDmaChSetInitialTd(_PSPI_DMA_Channel, _PSPI_DMA_TD);    
            
    PSPI_RX_DMA_Done_ISR_Start();
}

// set up DMA to transfer burstCnt bursts of 1 byte from the PSPI rx 
//    our DMA irq will trigger letting us know when the data is available
void Set_PSPICmdDMATransfer(uint16_t burstCnt, uint8_t respByte, uint16_t status) {
    
    // assuming the SPI device will echo the last byte in the tx fifo, we will add a busy
    //   byte so the master will know when we are done processing the last command 
    //     this will happen when we change the tx fifo byte to PSPI_READY

    //PSPI_ClearFIFO();
    PSPI_ClearTxBuffer();
    PSPI_WriteByte(respByte);
 
    _PSPICMDFlags = status;
    CyDmaTdSetConfiguration(_PSPI_DMA_TD, burstCnt, DMA_DISABLE_TD, TD_INC_DST_ADR | PSPI_DMA__TD_TERMOUT_EN);
    CyDmaChEnable(_PSPI_DMA_Channel, 1);     
}

void PSPI_RX_DMA_Done_ISR_Interrupt_InterruptCallback(void) {
   
    _PSPIRecvCnt = 0;
  
    PSPI_ClearTxBuffer();
    PSPI_WriteByte(PSPI_BUSY);
           
    // This DMA interrupt will trigger in three cases
    //  In the first, the DMA transfer of a PSPI command byte has finished
    if (_PSPICMDFlags == PSPI_IDLE) {
        _PSPICMDFlags  = PSPI_CMD_READY;
        _PSPICurCMD = _PSPIInputBuffer[0];
        
        // setting up dma here appears results in the ready byte being in the tx buffer
      // Set_PSPICmdDMATransfer(1, PSPI_READY, PSPI_IDLE);
        
    }
}

void Init_System(void) {  
    
    // turn on the PSPI connection
    PSPI_Start();
    
    // start the irq that handles possible lockups
   // PSPI_SS_IRQ_Start();
    
    // prepare the PSPI DMA for incoming PSPI data
    Init_PSPIDMA();    

    // and set up the dma transfer for the command byte
    Set_PSPICmdDMATransfer(1, PSPI_READY, PSPI_IDLE); 
}


int main() {
    CyGlobalIntEnable; /* Enable global interrupts. */
    Init_System();
    
    //Handle_LCDDemo();
    
    while(true) {
        
       // we received a command byte so figure out what we need to to do
       if (_PSPICMDFlags == PSPI_CMD_READY) {
            //Handle_PSPICommand();
            
            // setting up dma here does not place ready byte into tx buffer
            Set_PSPICmdDMATransfer(1, PSPI_READY, PSPI_IDLE);
        }       
    }
}

 

 

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I am using an CY8C21534-24PVXI part using a UART block version 5.3 Have it set up to use both tx and rx interrupts, modified boot.tpl accordingly. Am NOT using the command buffer feature, have my own fifos. The transmitter works fine, but I can never get an Rx interrupt. Have no idea why this is, compiles fine, schematic editor looks fine just like the other examples. Scoped it and data is getting to the pin so this is not the issue. So..what's missing here, does this actually work? thanks ken Show Less

How can I read the unique id from PSoC 5LP devices within ppcli?

Refering to PSoC 5LP Registers TRM and according to code generated (CyLib.c and cydevice_trm.h the unique is stored at addresses like 0x4900 010x (with exception of CYREG_MLOGIC_REV_ID referring to 0x400046ec).

How can I retrieve these values for production purposes before flashing user code (i.e. without executing user code)?

I tried things like PSoC3_ReadRow 0x4900 0x0n 0x00 (n = 0..F) but the given results do not seem to contain right values.

Is there a function for reading data from random (existing) addresses in address space?

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Hi,

I am trying to configure multiple pins connected to interrupts but I receive an error [see attached pictures].

 

 

 

Thanks,

Roy Roif

 

@Motoo_Tanaka 

 

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We are using the UART with the HW fifo of 4, we find that when disabling interrupts for long time (not for 4 fifo long), we start to loss bytes sometimes (for our opinion the HW fifo not works OK).

Here is our interrupt handler that we used for testing:

CY_ISR(drvUART_A_RxISR)
{
uint8 dataByte, statusByte;
uint16 receivedData;
uAmaxrcv=0;
do{
  receivedData = UART_A_GetByte();
 dataA[k] = receivedData;
  k = (k+1)%BLEN_TEST;
  dataByte = (uint8)(receivedData & 0x00FFu);
  statusByte = (uint8)((receivedData & 0xFF00u) >> 8u);
  if((statusByte & UART_A_RX_STS_FIFO_NOTEMPTY) != 0u){
          if((statusByte & (UART_A_RX_STS_BREAK | UART_A_RX_STS_PAR_ERROR |
                UART_A_RX_STS_STOP_ERROR | UART_A_RX_STS_OVERRUN)) != 0u){
                g_drvUART_driverStatus.uart_rxStatusErr[DRV_UART_MODULE_A]++;
    }
         else{
              drvUART_fifoPushByte(DRV_UART_RX_FIFO_A, dataByte);
      uAmaxrcv++;
        }
    }
}while((statusByte & UART_B_RX_STS_FIFO_NOTEMPTY) != 0u);
if (uAmaxrcv > uAprevmaxrcv){
     uAprevmaxrcv=uAmaxrcv;
}
}

What we have seen that when we care disabling the interrupt for short time (not more than 1 byte in 4 bytes HW fifo) we are not loosing bytes, but when we are increasing the time of disale interrupt (global interrupt) we start to loose bytes even when 'uAprevmaxrcv'  is 2.
Thanks for any help,

Dudi

 

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