PSoC™ 5, 3 & 1 Forum Discussions
Does anyone have any turnkey 8-bit parallel FIFO components?
My use case is:
- I wish to receive 8-bit data via DMA; I want a component where, every time I poke it via a signal, a parallel 8-bit bus is sampled and pushed onto a FIFO.
- I wish to send 8-bit data sourced via DMA; I want a component where, every time I poke it via a signal, it fetches an 8-bit value from a FIFO and expresses it on an 8-bit bus.
These used to exist on the old PSoC Sensei blog, but that's now gone. I know that you can't do this using the standard UDB tools and have to resort to low-level hacking via the datapath configuration tools; there are some extremely fuzzy instructions in https://www.cypress.com/documentation/application-notes/an82156-psoc-3-psoc-4-and-psoc-5lp-designing-psoc-creator-compon… but there's only about a page buried in an appendix. I'm really looking for some turnkey components I can just drop into my design.
(Plea to Cypress: please can we have these in the standard component library?)
Thanks!
Show LessSo simply put we have been utilizing the CYC8KIT-059 for quite awhile now. Our developer that was most familiar with the KIT has passed away taking his information and documentation with him. I am pretty familiar with PSoC Programmer and Creator, but have never tried to reverse engineer a project. All we have left from his work is a finalized .hex file. However now we are needing to modify the original programming / layout. So you can see if there is a way for me to poll the information off of the KIT that would be very beneficial rather than beginning the entire project again, when we have over 100 orders that we need to modify and get out. Any suggestions or help would be greatly appreciated.
Show LessHi,
We have an application on Cy8C3246 using following code snippet to enter sleep mode:
CyPmSaveClocks();
CyPmSleep(PM_SLEEP_TIME_NONE, PM_SLEEP_SRC_ONE_PPS);
CyPmRestoreClocks();
During sleep our entire system draws a current of approx 4µA.
To further reduce power consuption (mainy by waking up the PSoC only when required by an external device), we want to use following construction:
CyPmSaveClocks();
CyPmSleep(PM_SLEEP_TIME_NONE, PM_SLEEP_SRC_PICU);
CyPmRestoreClocks();
where an external component wakes the PSoC every minute (in stead of every second)
However the current drawn by the enire system during sleep is now appox 25µA.
What causes this increment in current and how can it be prevented? The only alteration we made to the code is the replacement of the wakeup parameter.
(Note CyPmHibernate() is not useful to us, since this leaves he io pins floating)
Thanks,
Krs
Show LessEstimated Cypress community and technical staff. I would like to ask you what's the minimum sampling frequency (analog clock frequency) admited by LPF2 low pass filters. I'm currently working on low frequency applications with these filters in 29466 PSoC1 devices.
Thank you in advance.
Emanuel Dri
Show Lesswhere can i have the zip project of this example https://www.cypress.com/file/108526/download i have configure all manually but i cant get it work
Show LessSome of the users of my device (http://cowlark.com/fluxengine) are reporting problems which I think could be due to bad termination of the cable used to connect the hardware being driven to my device.
I would like to measure the voltage of some of my digital input and output pins, so I can check the actual levels to make sure they're being driven correctly; this should let me detect this situation and warn the user. Is it possible to configure an ADC to a digital pin?
Show LessI am using PSoC 5lp to display time on LCD with RTC. The LCD displays wrong time and other characters in between I dont have any errors. I tried changing PLL frequency floating format and stack and heap size. Still no change
please help me in this.
Thank you.
Show LessHello all ,
i have a custom PCB with PSOC on it ,
i have 1 input pin controlled by a switch (switchPIN),
i have 2 outputs pins (resetPin , onoff_Pin),
i implemented the following logic :
if someone turn the switch off switchPIN=0 and 6 sec is passed then turn off onoff_Pin-->0,
but if someone turn the switch off switchPIN=0
and BEFORE 6 sec is passed he turns on the switch switchPIN=1
then send reset pulse (resetPin =1 wait 100ms then resetPin =0).
i have 2 isr functions
when the switch is on :sw2_on_int is starting the timer
when the switch is off: sw2_off_int is stopping the timer.
this design works .
but if i start moving the switch very fast on and off
sometimes i get a weird bug .
the sw2_off_int isr is firing and reads 0 time this makes my whole design goes crazy .
i have no idea how can this happens ??
maybe i need to set isr priority?
2 isr is firing at the same time ??
can someone please review my code and tell me
am i doing wrong ???
the bug is in line 112
thank you.
Show Less
Hi, I am attempting to use a soft power switch configuration with our PSOC3 driven product and having an issue with hibernate mode, in that the cpu seems to come out ofCyPmHibernate() right after going into it - without the power switch being turned on.
Prior to the hibernate call I am sleeping /stopping all components, clearing interrupts, etc. and re-configuring clocks per the System Reference guide. There are ample delays for some servo motor commands prior to powering down, so I'm not worried about debounce of the switch. Below is a code snip from the power down routine.
I have had to put in a loop that waits for the power switch to be turned on, so the unit is sitting in this loop using about 7ma - not good, but I am having to ship product like this until I have a solution.
As I understand it the PICU is the only way to wake up from hibernate. I assume that I'm overlooking something that is waking things up, any suggestions/ideas on where to look next?
...
PWR_SW_ClearInterrupt();
CyPmSaveClocks(); //Save Clock configuration before entering Hibernate
CyPLL_OUT_Stop(); // change clock configuration for hibernate
CyIMO_SetSource(CY_IMO_SOURCE_IMO);
CyMasterClk_SetSource(CY_MASTER_SOURCE_IMO);
CyPLL_OUT_Stop();
CyXTAL_Stop();
CyXTAL_32KHZ_Stop();
PWR_SW_ClearInterrupt(); // again
CyPmHibernate(); // put the device into hibernate mode
//***** CPU is supposed to stay ^ Here until power switch turned on *****//
while (powerSwState = PWR_SW_Read()); // DEBUG - wait here till power sw is low (on)
PWR_SW_ClearInterrupt();
CyPmRestoreClocks();
...
Show LessHi All,
I'm working with psoc5 (CY8C5888LTI-LP097) I want to use two filters per design so when i used two filters it is giving an error as Resource limit: Maximum number of Digital Filter Block exceeded (max=1, needed=2). (App=cydsfit).
please can any one tell me that I can use two filters or not what is the solution for this?
Regards,
Roopa
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