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PSoC™ 5, 3 & 1 Forum Discussions

david-given
PSoC™ 5, 3 & 1
Does anyone have any turnkey 8-bit parallel FIFO components?My use case is:- I wish to receive 8-bit data via DMA; I want a component where, every tim... Show More
dama_4585341
PSoC™ 5, 3 & 1
So simply put we have been utilizing the CYC8KIT-059 for quite awhile now.  Our developer that was most familiar with the KIT has passed away taking h... Show More
KrDe_284951
PSoC™ 5, 3 & 1
Hi,We have an application on Cy8C3246 using following code snippet to enter sleep mode:CyPmSaveClocks();CyPmSleep(PM_SLEEP_TIME_NONE, PM_SLEEP_SRC_ONE... Show More
EmDr_1490911
PSoC™ 5, 3 & 1
Estimated Cypress community and technical staff. I would like to ask you what's the minimum sampling frequency (analog clock frequency) admited by LPF... Show More
YoDe_1666546
PSoC™ 5, 3 & 1
where can i have the zip project of this example https://www.cypress.com/file/108526/download i have configure all manually but i cant get it work Show More
david-given
PSoC™ 5, 3 & 1
Some of the users of my device (http://cowlark.com/fluxengine) are reporting problems which I think could be due to bad termination of the cable used ... Show More
NaMa_4430341
PSoC™ 5, 3 & 1
I am using PSoC 5lp to display time on LCD with RTC. The LCD displays wrong time and other characters in between I dont have any errors. I tried chang... Show More
EyLa_1625036
PSoC™ 5, 3 & 1
Hello all ,i have a custom PCB with PSOC on it ,i have 1 input pin controlled by a switch (switchPIN),i have 2 outputs pins (resetPin , onoff_Pin),i  ... Show More
Anonymous
PSoC™ 5, 3 & 1
Hi, I am attempting to use a soft power switch configuration with our PSOC3 driven product and having an issue with hibernate mode, in that the cpu se... Show More
Roka_4525941
PSoC™ 5, 3 & 1
Hi All,I'm working with psoc5 (CY8C5888LTI-LP097) I want to use two filters per design so  when i used two filters it is giving an error as Resource l... Show More
Forum Information

PSoC™ 5, 3 & 1

The PSoC™ 5LP, PSoC 2 and PSoC 1 Forum discusses - 24-bit Digital Filter Block (DFB), 24 UDBs, DMA controller and integrating AFE, digital logic with user interface ICs with an Arm Cortex-M3 CPU solutions.