PSoC™ 5, 3 & 1 Forum Discussions

I work with the PSoC 5LP Prototyping Kit, and I try to connect with the I2C to the MPR-121 component and read the values from it. Can I get some help on this? Can't figure out which register I'm supposed to send the commands to, and how it should be executed exactly.

Thanks

What will be the best interface option for exchanging bi directional  data stream between two PSoC3 boards.

Regards

Hi all,

I have been working UART communication via radio between PSoCs. I want to be able to detect errors during communication for which I have been recommended to use some sort of checksum. Below is the scheme I am using to send the data.

Start Byte, Byte 1, Byte 2, ....., Byte N, chksum, CR

Now, I just want to understand how the cheksum would work. I understand that the receiver would also send the calculated cheksum back and should they match, I would have no error, and if they don't I would have an error.

The one thing I don't understand is how would the transmitter know if there was an error. Does the receiver send an acknowledge signal? How does the receiver know which byte is the cheksum byte? What if the cheksum did match and the receiver sent back an ack signal, however the message got lost along the way signifying an error eventhough there was not one?

Hello,

i am new to the world of PSOC and have more of a digital, than analog background, so i hope my question is somewhat valid.

I'm doing a project and try to build a signal simulator for it - very weak signals. I use the CY8CKIT-059 kit. For basic testing i use this setup:

The WaveDAC is an iSource. The VDAC is there to pull the signal to zero, so i can lower the input range of the ADC. The digital filter in the end is there so i can calculate the signal to noise ratio (SNR). In this setup i get a sinus signal between about 0 - 2.2V.

My goal is to dampen the signal. just in this setup i have two possibilities to do so

a) lower the WaveDAC output range to either 0-255 uA (8x smaller) or 0-32uA (64x smaller)

b) make the resistor smaller

a) works perfectly. the ADC reads signals that are about as much smaller as they should be. if I test with an oscilloscope at the Testpoint (TP) it's somewhat the same.

b) on the other hand does not at all, what it should (or at least i think it should).
if i replace the 1K Resistor at R_DAC with a 10 Ohm resistor, the signal should be 100x smaller (0-20mV). if i test with the oscilloscope at the TP it is roughly in the correct neighborhood. the signal has a 20mV offset and is only 66x smaller, but that is still much closer, than what the ADC reads. Peak-to-Peak the ADC gets 220mV, so only 10x smaller instead of 100x.

if I use a 1 Ohm resistor, it should be 1000x smaller (0-2mV). The oscilloscope tells me of 8mV peak-to-peak (275x smaller), but the ADC reads 175mV peak-to-peak (only 12x smaller!!)

What do i do wrong? The ADC is set to continous and bypass buffer, so there should be no gain, or?

The signals look fine - i get an SNR of mostly over 50db.

I plan on trying out current dividers and opamps to dampen the signal, but would rather like to keep it as simple as possible.

To whom it may concern,

Would it be possible to provide more details regarding the following excerpt:

- What is the minimum resistor value that can be used as a ‘strong’ pull-up on the MSB?
      -> Can it be shorted to either VDD or VSS?
      -> Equally what happens if resistor to VDD/VSS is >200k or left open?

- How do the address pins sense the strong pull-up?

- How tolerant is this sense circuitry tolerant to noise?
      -> Are decoupling capacitors required?

- What will happen if a resistor value between 330~75KOhms is tied to the address pins?

- Are the 330 Ohms and 75kOhms defined to work over the -40 ~ +85C temperature range?

- Are the Address bits pull up/down resistors only sampled once at power-up?
      -> Are there any timings/thresholds for which pull state must comply to?

Look forward to hearing from you.

Many Thanks,
Bhav

I have a Dual-App Bootloader and two identical Bootloadable applications in a PSOC5LP. I have functioning code that updates one image while executing out of the other. Now I need to be able to switch from one image to the other, after updating it, WITHOUT issuing a reset ("hitless upgrade") that affects I/O pins (power supply enables, peripheral resets, etc) or SRAM (task state machine variables, register settings).

Is there a well-understood mechanism to pass control from one application image to another, or to do so via the bootloader but without service-affecting reset?

I figure it should be possible (if arduous) to ensure both images point to the same memory structures, and upon booting the image decide whether or not to initialize based on the reset source (or just a bit in memory).

Any pointers are welcome! Thanks in advance.

I've tried to use a I2Cm user module in a project with CY7C638xx chip but it does not appears in the User Modules folder.

Is there any example code to use an external I2C EEPROM with CY7C638xx chip?

Thanks in advance for any help/tip.

Hello,

I have problem.

I have project (my board), where is GSM module connected to uP from PSoC 5LP family. The communication is solved between PSOC uP and GSM module by AT command over UART. The problem is in reading RX status reg. I need wait in loop to some response from GSM:

GSM_ClearRxBuffer();

        while( (GSM_ReadRxStatus() & GSM_RX_STS_FIFO_NOTEMPTY  ) != GSM_RX_STS_FIFO_NOTEMPTY)

        { 

            CyDelay(1);

            tmpCitacVypni ++;

            if(tmpCitacVypni == 7000)

            {

                tmpNum = -1;

                //GSM_PutArray((uint8_t *)ESCAPE,1u);

                tmpCitacVypni = GSM_ReadRxStatus() & GSM_RX_STS_FIFO_NOTEMPTY  ;

                break;

            }

        }

        //CyDelay(ATDELAY);

        // jeste mu dame cas na odpoved

        tmpCitacVypni = GSM_ReadRxStatus() & GSM_RX_STS_FIFO_NOTEMPTY  ;

        for (ii = 0; ii < RX_BUFF_LENGTH ; ii++ )

        {

            rxBuff [ii] = GSM_ReadRxData();

        }

The problem is the flag is not set in:

        while( (GSM_ReadRxStatus() & GSM_RX_STS_FIFO_NOTEMPTY  ) != GSM_RX_STS_FIFO_NOTEMPTY)

.... the same is on next line

        tmpCitacVypni = GSM_ReadRxStatus() & GSM_RX_STS_FIFO_NOTEMPTY  ;

..... flag is not set but the new data is available to read in :

        for (ii = 0; ii < RX_BUFF_LENGTH ; ii++ )

        {

            rxBuff [ii] = GSM_ReadRxData();

        }

Do you know where is problem? How can I solve it?

the problem is in ATprikazy.c file in int8_t GSM_PrijataSMSVycti(uint8_t idxSMS) function.

Hi all,

      When I use PSoC1 CY8C20236, I added both the CSD module and ADC module in the project.  The project can compile normally, but it not working properly.  If add "ADCINC_Start(ADCINC_INPUT_ANALOG_BUS); " in the main.c,  or other ADC API.  The CSD can not work normally.    How to use the two module at the same time?

Perry