PSoC™ 5, 3 & 1 Forum Discussions

I walked into a PSOC 5LP design where it was assumed the SAR was running a full 12-bit unsigned resolution in single ended mode. This didn't appear to be the case and after struggling with settings both high level as well as low level register settings I can't seem to make it work as a 12-bit single-ended unsigned ADC. Is this possible with this device? If so, please tell me how to use it that way. Also, please add this question to the list of FAQs for these devices.

Hi, 

I am new to development on the Cypress/PSoC platform. I will attempt to explain what I am trying to do. I have initialized an IDAC source and connected its output to the input of an analog MUX. The analog mux has two outputs, each of which is connected to an analog pin. Upto here, my operation works fine and I have managed to configure and test these components. 

Now I want to connect the two analog output pins from the MUX to a SAR ADC. I am using the component - Sequencing SAR ADC [v2.10]. I am trying to configure it with two single-ended channels and attempting to feed the input of the two analog pins from this to the inputs of the ADC. However, when I try to do this, it gives me 3 errors and a couple of warnings. I will attach a screenshot of these errors so that it can be understood what the issue might be. Any assistance on this will be appreciated. 

Hi, 

(How) Is it possible on PSoC5LP to DMA transfer 32 bytes from DWT_CYCLE_COUNT 0xE0001004 to RAM.

Viktor

I tried to implement the hibernate example from this project on my board and it gets stuck in hibernate mode.  So I took out the CY8CKIT-059 and modified my code example a bit to fit this board and it still gets stuck in hibernate mode, well sort of. I think it is accepting the GPIO interrupt partially since the current draw increases after the button press, but it does not execute any of the code after the CyPmHibernate(); CyPmRestoreClocks();.   The code is slightly modified from the by example by blinking the LED so I can see where in the code we are without debugging.  I have attached the project. 

The CE95346 - Power Management and Hibernate with PSoC 3/5LP  example does work maybe because of the custom ISR?

Any Ideas? (could I have some system setting wrong?) I haven't found any note to a similar problem.

Here is the Hibernate section of the code:

case HIBERNATE : /* 0x41 - Hibernate - PICU */
{
/* Display mode and set LCD pins for low-power. */
LCD_Position(1,0);
LCD_PrintString("Hibernate ");
LED_S_Write(LED_OFF);
/* Start the button interrupt. */
isr_ButtonPress_Start();
SleepComponents();

LED_S_Write(LED_OFF);
CyDelay(1000u);
LED_S_Write(LED_ON); //blink the LED so I know where I am in the code
CyDelay(1000u);
LED_S_Write(LED_OFF);
CyDelay(1000u);
LED_S_Write(LED_ON);
CyDelay(1000u);
LED_S_Write(LED_OFF);

/* Save clocks and enter low power. */
CyPmSaveClocks();
CyPmHibernate();

/* The PSoC wakes up here. Restore everything and clear PICU interrupt. */
CyPmRestoreClocks();

LED_S_Write(LED_ON); //Status LEDs so I know where I am in the code
CyDelay(1000u);
LED_S_Write(LED_OFF);
CyDelay(1000u);
LED_S_Write(LED_ON);

WakeComponents();
/* Stop the button interrupt. */
isr_ButtonPress_Stop();
Button_ClearInterrupt();

break;
}

Exasperating problem arose after a a minor code change to a running development board - every time I started the debugger it immediately exits with the message " Encountered error (Target disconnected See output window for more information.)".

I've eventually tracked the issue down to this line of code in cyfitter_cfg() in cyfitter_cfg.c (after setting the debugger to not run to main).  As soon as this code executes the debugger exits:

CYCONFIGCPY((void CYFAR *)(CYREG_PRT1_DM0), (const void CYFAR *)(BS_IOPINS0_1_VAL), 8u);

I could understand why changing the port configuration would break the debugger - what I haven't been able to locate is what values are being copied over (BS_IOPINS0_1_VAL points into flash ECC and I can't find anywhere where/how they are being set).

I've rebuilt the project multiple times, changed the debugger type from JTAG to SWD back and forth, tried a new minProg3 all to no avail.

When the issue started I had made a minor code change to the implementation code- nothing related to the system code and the fitter was not changed, so I'm at a loss why this would suddenly start.

Note the debugging option currently is set to "SWD+SWV" in the system configuration. 

Clearly the chip thinks these pins are being used for GPIO but I can't find anyway to convince it otherwise, or even the setting that changes it.

Any help appreciated.

I would like to use a PSoCLP5 as a "power manager" for a large Xilinx FPGA.  The PSoC5LP controls the sequencing of power supplies to the FPGA, monitors current and output voltage of every FPGA supply rail, temperature, etc. 

All of these measurements are reported over I2C to the FPGA and via a USB to UART bridge (implemented in the PSoC5LP) to a host system.  All of these requirements make the PSoC5LP a very good solution.

The PSoC5LP is powered continuously from a switching regulator that runs slightly above the dropout voltage of two LDOs.  One of the LDOs produces +3.3V for most of the I/O and VDDA.  VDDA is powered though a LC filter.  The other LDO produces 1.8V for producing one of the I/O banks VDD. 

Driving an unpowered FPGA will forward bias the ESD diodes on its inputs causing a voltage to appear on its power supply rails.  Unless the generated voltage is kept below 2.5V when the FPGA is not powered, the Xilinx device may be damaged.   One robust solution is to run the I/O between the PSoC5LP and the FPGA at 1.8V.  

Here are a few questions:

1. Are there any power sequencing requirements among the PSOC5LP's power supply rails?

2. If an I/O bank is not in use is it safe to remove power for that bank?  Will the rest of the PSoC5LP I/O on other banks continue to function normally?

Thanks for your help,

Wayne

A PSoC5LP controls power supply sequencing for an FPGA.  The PSoc5LP measures and reports current and voltage on the FPGA's power rails as well as FPGA die temperature to a host system via a USB to UART bridge. 

The PSoC5LP's USB interface is permanently connected to a CY7C65642 embedded USB hub.  No USB cables are ever inserted or removed.  However, aggressive power management is being done. Power to most of the system is removed unless the system is operational.  The embedded USB hub will be powered off when the system is idle.

The PSoC5LP is powered from +3.3V continuously from an "always on" power supply.  The PSoC5LP is performs power management by turning power off and on to the rest of the system.  The PSoC5LP will power the entire system up from idle after a period of time has elapsed or by an external wake up signal.

Questions:

1.  What is the proper way to connect power and USB signals to the PSoC5LP so that a "self powered" USB interface is created? Many other MCUs have a "VBUS" input to monitor USB bus voltage.  I don't see that on the PSoC5LP.

2.  Should the PSoC5LP's USB interface be "re-initialized" after power to the embedded USB hub is applied to mimic the insertion of a USB cable?  If so, how?

Thanks for your help dealing with these USB "corner cases"!

Wayne

Howdy, 

I'm a mechanical engineer... graduated nearly 10 years ago now... I need to be able to control things and need to build up an entirely new skill set.  I was turned on to Psoc because a vendor that designs controllers for my job suggested I start here. 

I know it's a lofty goal but I need to learn how to control ICE engines. I'm not an automotive company, just a guy trying to figure out a very serious hobby that will increase my capabilities.  I've seen some pretty cool things being done with raspberry pi but for my end application I need something a little more professional. 

Where do I start? What software do I use, what programming language do I learn... seriously I know what I'm asking is border line nuts but hey... gotta start somewhere.  

I don't want to do anything spectacular, infact the simpler it is the better. I've talked to all of the big aftermarket/race ECU companies and none of them do what I need so here I am.