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PSoC 5, 3 & 1 MCU

New Contributor

Hello Cypress Forum,

I'm having an issue where the I2Cm_SendStop() appears to create an extra pulse on the SCL line in PSOC1. We are having communication issues with the slave that are catastrophic in certain conditions and the slave device sometimes won't ACK the PSOC with this extra pulse and the whole design fails. We think our problem of the slave not acknowledging the master is due to the extra clock pulse after the ACK. I've created a slide that shows the I2C transactions with a one byte write both with a stop and without and the code that generates this transaction. In both pics the slave acknowledges the master as I haven't created the failure state. I am just showing the extra clock pulse that is being created by the I2CmSendStop code.

Does anyone know why this is happening and how to correct it?

Also, is it possible to write my own send stop function and still use the I2Cm API library if this extra pulse can't be removed?

In my application I am using the Low Level functions.


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