If you right click the project and select "Update Components" it should put everything in order. You are correct, I am a version behind on 4.1. If you actually want to build and use the project I posted you will also probably need to change:
Target Device - Right Click Project > Device Selector
Pin Selection - Design Wide Resources > Pins
Clocks - Design Wide Resources > Clocks
VDD levels - Design Wide Resources > System > Operating Conditions
as I'm using a different PSoC and setup to test with than you are.
Regarding your new project:
- Rather than pulsing the reset lines for the timer with a software delay, you actually already have the control register component set to "Pulse" which will do it automatically. When you write a "1" to the control register it will generate a pulse, then return to the starting state (0). The pulse will last for one clock cycle of attached clock signal, which will be enough for the timer to recognize it and reset the counter registers.
- You've got your Timer_1 component, the one set for 2S configured for trigger/capture, which you don't need. It's job is to start and hit the Terminal Count once before you reset it in the ISR. Set Trigger/Capture to NONE and remove the interrupt on capture. We only want interrupt on TC.
