Announcements
IMPORTANT: Cypress Developer Community is transitioning on October 20th. To learn more and be prepared for this change, check out our latest announcement.
cancel
Showing results for 
Search instead for 
Did you mean: 

PSoC 5, 3 & 1 MCU

luisji
New Contributor II

The original Re: 3 identical shifted signals, 5 Khz, tunnable by program, with sensors 

I had to make the new question because the previous somebody marked it 'as solved', then, when I could return to this problem and asked the next subquestion, nobody see it because 'it is marked as solved', although it is far away of being really solved.  I'd ask, Solved for who?  If the person with the question can't handle the answer as something that solves the real problem, it is not solved. 

So, excuse me for the delay.  I'm now back with this problem.    I hope CONSULTRON could continue helping me as he gave me the example I'm working with.

As I stated first, I need to move frequency about +- 12% from a frequency, that is a little lower than 5 KHz, in order to sustain some resonance on the system.  i have seen what you sent, I understand that the clock was defined as the 8 bit period (256) multiplied by 5,000 Hertz, so you get a clock of 1.28 MHz. but as I need to move smoothly the frequency from the program (see the image freq_resonance attached), I see at first sight two posibilities: 

1. To change the frequency on the clock with  Clock_SetDividerValue(uint16 clkDivider) or

2. To change Period of the first PWM 

The problem is that I don't know which values are elegible in case 1. and that the steps that would be available in case 2. are very wide (18.35 Hertz per step), and, if the range is about 564 Hertz for each side, with 30 steps I'll never can sustain resonance (I would correct from a derivative control factor, but if it doesn't work, it would become a PID algorithm). I think that the minimal step should be about 4 or 3 Hz.  At the beginning, the program will scan the range until it finds the resonance frequency.  The input for the program will be a sound, so when amplitude reach a peak, the program has to avoid loosing resonance moving frequency as needed.  The resonance freq. could vary a little with rise of temp, the system has to make the changes needed, if amplitude begin to decrease, it has to oscilate slowly to verify on which direction it reaches the peak again (zero slope).  I think that the green range, of about 500 Hz will be enough, but I'll know it until the experiment be phisically implemented.  

 Another thing that I want you to help me is the next:  I have to sustanin resonance, but I want to read and display several sensors (a microphone, temp, presure, amp, volt, etc).    How can I do all that?   That is, I think I have to avoid to wait for response, it be a sensor, the display or whatever, so I think I would have to have a clock and each component would check if the delay time is reached for it, each round of the program, so for instance, it could send another data to display or it could read an ADC register if a flag is now on on each one. This way I don't interrupt the frequency generator. (supposing that it become stopped while a delay instruction is working)  So, if You could help me to make clear this item I'd thank  you a lot.

I have not reviewed the other example you gently sent me, but from a surface sight, I think that LUT  can't comply with the requirement of min step here stated, but you can correct me if I'm wrong.   

I wonder if, as it is marked as solved (I don't understand what for is that costume of setting as solved this), this question will be seen and attended.   I hope it be...

Thank you again

Luis

I have checked the signal of the example in my psoc 5 and an image of it is attached as Fase1 y 2.  That means that I have saved some obstacles until having it working.  This is not much, but it is some advance.  I'm going to put more time on this project in next weeks.

0 Likes
34 Replies
EvPa_264126
Valued Contributor II

Can you use a VCO?
This way you can smoothly control the frequency.
In the future, you will figure out how to organize feedback from the microphone.

0 Likes
luisji
New Contributor II

can the VCO work with an API?

 

0 Likes
EvPa_264126
Valued Contributor II

Yes, you can change the current of the IDAC component or add a VDAC component for the Vin input.
It might make sense to replace the IDAC with a resistor and add a hysteresis option to the comparator for stability.

0 Likes
luisji
New Contributor II

I'm going to try this.  If it works, I'll need then to have a 3 phase signal.   How could be optimal to get the other 2 signals, shifted 120 degrees and following the frequency changes that the program make over the first signal?   

When it be solved, I'll need to add the ADC and the microphone and program and tune the feedback.  Then, I'll add another components.   Somebody sent me a message asking if this is solved, but there are several questions yet that  will be done as the more basic questions become answered.   

Thank you for your help.

Luis

 

0 Likes
luisji
New Contributor II

The LUT proposed I think is very different from what is needed, or there is something I'm not understanding about it.   See attached graph please.

And,  I don't know how could this LUT have a  variable frequency...

 

0 Likes
Len_CONSULTRON
Honored Contributor II

Luis,

The LUT I provided in my upload to your previous post 3-identical-shifted-signals-5-Khz-tunnable-by-program  matches your LUT requirement.

Len
"Engineering is an Art. The Art of Compromise."
0 Likes
EvPa_264126
Valued Contributor II

Perhaps you will be satisfied with a more universal table option: synchronous multi-channel wavefrom generator with DACs and DMA
If desired, you can generate a sine.
But the solution with LUT at this stage will probably be easier.
Eugene

luisji
New Contributor II

Thank you.  Give me some time to implement this and come back with more questions, because the complexity of this project, I'm sure, has yet some surprises for me

0 Likes
luisji
New Contributor II

I see a problem, the signal I need doesn't match the needs, please see the attached graph.  I don't need a continous signal with a low pike, but a squared signal.   How can I get the second?

Thank  you

 

0 Likes
EvPa_264126
Valued Contributor II

To get 50% square waves you need to use a T-trigger (Toggle Flip Flop) after the generator.

0 Likes
luisji
New Contributor II

Now the question is how to use that flip-flop component to get that 50% squared signal.  And the second question is if this component won't have trouble when freq. be variating.  

Are you sure that LUT with flip flop is is the optimal way to get that signal, tunnable, at that frequency? 

My problem here is that I have been told to solve my problem with VCO, DDS24, DACs DMA, LUT and other components, and it seem that there is not one who really knows the cypress microcontroller options and with that knowledge tell me with complete certainity:  "This is the optimal way to solve this"  I have months asking for a solution, and I only have a lot of different oppinions.   Is there somebody who can really tell me what is the best solution possible for this problem??   Excuse me for the question, but I really need to finally put this to work. 

Luis

 

 

0 Likes
EvPa_264126
Valued Contributor II

As I understand it, the main problem is smooth regulation of the signal frequency in a narrow range (+ - 12%).

Your signal is 5 kHz. This means that 30 kHz must be applied to the LUT input, the T-triggrr input requires 60 kHz.  A VCO with a PSOc comparator requires the comparator to be clocked, which poses smooth frequency sweep problems.

Perhaps it is worth considering the option of using the VCO on external discrete components.
For example   VCO with a 555 Timer Chip

0 Likes
luisji
New Contributor II

So you think that the solution is a psoc5 with a VCO component plus  a flip flop component plus a 555 oscilator circuit??

I wonder why would I need an advanced microprocessor if the better way to solve making a signal generator is a 555.  Or, are you telling that the Psoc drives the 555 circuit? Then, for the 3 phase, will I need three 555 circuits?  How will them be 'in phase'?   

I'm ganining in confusion.    I feel like in a dead end.   If you know a super-expert on Psoc, please tell him we need some help !!

Thank you for your time

Luis

 

 

0 Likes
Len_CONSULTRON
Honored Contributor II

Luis,

I recommend staying in the digital domain.  The analog domain (VCO and 555) can easily drift and not have accurate (or stable) values.

By staying in the digital domain, you can more easily predict and determine the final resonance achieved.

I've uploaded a modified copy of my previous project with the LUT for 3 phase generation.

It has a simple improvement to provide a output frequency to the 3-phase of +/-0.25%.

Additionally I need to make a correction to my previous statement that the design was +/- 11.5 Hz.  The original miscalculation is that the resolution of +/- 11.5 Hz was on clk_3ph.  The output frequency resolution is better than that by 6x.  Therefore the output frequency resolution is 1.92 Hz.  This should meet your targeted resonance resolution.

Good News!!!

Len
"Engineering is an Art. The Art of Compromise."
0 Likes
luisji
New Contributor II

I'm very thankful with you for being still here helping me.   I'll study this last project and will inform you about it.   

Have an excelent day

Luis

 

0 Likes
luisji
New Contributor II

But, should I change the LUT to what I think?   See the attached image please.

0 Likes
Len_CONSULTRON
Honored Contributor II

Luis,

I'm confused.  The LUT I supplied in the project I attached is in the form listed under the Title "What I Think is Needed".  except the period is 200us (5KHz) not 200ms (5Hz) that you show.

In addition the tunnability is +/- 2Hz as you are trying to target.

Len
"Engineering is an Art. The Art of Compromise."
0 Likes
luisji
New Contributor II

Yes, is my mistake, 200 uS.    But what about the image, about the out sequence?

 

0 Likes
Len_CONSULTRON
Honored Contributor II

Luis,

I'm still confused.  You provided two pictures of logic outputs.  Which one are you trying to achieve?

Len
"Engineering is an Art. The Art of Compromise."
0 Likes
luisji
New Contributor II

Dear Consultron

I have another question:  The clock goes at 30 KHz, the LUT has 8 positions.  I suppose that the signal can have six positions, as seen on the image in the red frame, because repeating these positions, the 3-phase signal can be reproduced. Although I see that the binary LUT input from 3 to 4 gives us less or more out states (isn't a way to have just 6 positions?)  Then, the 30 KHz clock, if divided by 6, gives us 5 KHz, but the LUT is 8 positions, and it is another sequence.  Then I don't know what will happen when state be 0 or 7, and how they affect clock and frequency

Next question is  how can I move frequency of the system from an API?   I see that there is a function:

Clock_SetFractionalDividerRegister()

or 

Clock_SetDivider(uint16 clkDivider)

that could be the one, but Can you give an example about how could it be in a program?  

Please see the excel doc attached.  I don't understand how to get the change on frequency with a clock who has a divider range stated in integers from 0 to 65,535, when I would need numbers between 0.88 and 1.12 with variations of 0.0004% in order to get 2 Hz steps.  

Then, it surge another question:  If each time this API is used, the clock resets, if the system was in resonance, it would be lost if the clock restart out of the previous pattern.  Is there a way of preserving the pace, the rithm after the frequency has changed a litlle?

Respect the image, your proposal, or what there is on the LUT you sent, is left, and what table I think is needed is on right side.  This is not a 3 phase motor, it will make a resonance on some pipes. 

Well, thank you again for all this...

Luis

 

 

0 Likes
Len_CONSULTRON
Honored Contributor II

I have another question:  The clock goes at 30 KHz, the LUT has 8 positions.  I suppose that the signal can have six positions, as seen on the image in the red frame, because repeating these positions, the 3-phase signal can be reproduced. Although I see that the binary LUT input from 3 to 4 gives us less or more out states (isn't a way to have just 6 positions?)  Then, the 30 KHz clock, if divided by 6, gives us 5 KHz, but the LUT is 8 positions, and it is another sequence.  Then I don't know what will happen when state be 0 or 7, and how they affect clock and frequency

First you will notice the the required 3 phase outputs feedback to the same number of inputs.

Len_CONSULTRON_1-1633696207994.png

Because there are 3 inputs, the LUT MUST HAVE 2^3 = 8 states.  It cannot have only 6 states.  However it can have 6 ACTIVE states.  The other states are initial or illegal states which must be declared and resolved at the next clock cycle.

For example state 0 is an initial state.   When the 3-phase generator is running only 1 or 2 outputs can be on at a time.  Never 0 or 3 outputs.  The exception is before the clock starts the outputs are all 0s.  This must be resolved to one of the states  on the first clock cycle.

state 7 is illegal and should never be present.  However if for some reason it did, it must be resolved to one of the legal states.

Len_CONSULTRON_0-1633696188119.png


Next question is  how can I move frequency of the system from an API?   I see that there is a function:

Clock_SetFractionalDividerRegister()

or 

Clock_SetDivider(uint16 clkDivider)

that could be the one, but Can you give an example about how could it be in a program?  

Please see the excel doc attached.  I don't understand how to get the change on frequency with a clock who has a divider range stated in integers from 0 to 65,535, when I would need numbers between 0.88 and 1.12 with variations of 0.0004% in order to get 2 Hz steps.  

 

 First:  Clock_SetFractionalDividerRegister()  does not exist for the clock component selected to drive clk_3ph.  Only Clock_SetDividerRegister() which uses only integers.

If you want EXACTLY 2 Hz variance, you're out of luck.  

My project gives you +/- 1.92233756... Hz resolution.    It is 'better' than the 3 to 4 Hz resolution you asked for but not an integer.

 Changing the PLL output frequency from 78 MHz to 75 MHz will allow a 1 count divider change to clk_3ph to be +/- 2.0008 Hz.


Then, it surge another question:  If each time this API is used, the clock resets, if the system was in resonance, it would be lost if the clock restart out of the previous pattern.  Is there a way of preserving the pace, the rithm after the frequency has changed a litlle?


I understand that you don't want "glitches" in the sound when changing the frequency to find resonance.  The Clock_SetDividerRegister() function has two parameters.

 

* Parameters:
*  clkDivider:  Divider register value (0-65,535). This value is NOT the
*    divider; the clock hardware divides by clkDivider plus one. For example,
*    to divide the clock by 2, this parameter should be set to 1.
*  restart:  If nonzero, restarts the clock divider: the current clock cycle
*   will be truncated and the new divide value will take effect immediately. If
*   zero, the new divide value will take effect at the end of the current clock
*   cycle.

 

 Note the second parameter 'restart'.  If this parameter is 0 then the new clock divider will start at the end of the current clock phase.  This is what you desire.

The uploaded modified program has the following new features:

  • The stimulus clock of the 3 phase starts at 5000 Hz and can increment or decrement this frequency by 2.0008 Hz.
  • It starts a UART communication at 115.2 Kbps 8N1.  Using a Terminal program 
    • An input  '-' will decrement the stimulus frequency by 2 Hz.
    • An input '+' or '=' will increment the stimulus frequency by 2 Hz.
  • The UART comm will compute report the current stimulus frequency.
Len
"Engineering is an Art. The Art of Compromise."
0 Likes
luisji
New Contributor II

You: state 7 is illegal and should never be present. However if for some reason it did, it must be resolved to one of the legal states.

Me: Then, what must I do to 'resolve' an illegal state to convert to the next legal state?

if something as some 'and' and 'not' logical gates can give us a '1' on 0 and 7 states, and that makes the change of state to the next valid state, it would avoid the illegal states.  But I don't know how to implement it here.

You: If you want EXACTLY 2 Hz variance, you're out of luck.
No, I'm still lucky because it doesn't matter what the step be while it doesn't be a very 'big step'

You: My project gives you +/- 1.92233756... Hz resolution.
me: Wonderful!! But I don't know yet how to do it

You: Changing the PLL output frequency from 78 MHz to 75 MHz...
¡Fabulous! But I don't know how to do it

You: The stimulus clock of the 3 phase starts at 5000 Hz and can increment or decrement this frequency by 2.0008 Hz. It starts a UART communication at 115.2 Kbps 8N1. Using a Terminal program. An input '-' will decrement the stimulus frequency by 2 Hz. An input '+' or '=' will increment the stimulus frequency by 2 Hz.
The UART comm will compute report the current stimulus frequency.

Me: Wonderful!!! But I have not idea of how to do it. I suppose that it is including an UART component, but I don't know where, if before or after the LUT, and how can I do this increment or decrement of frequency, suppose with an API of the UART, I'll read the datasheet of it.

Well, at least I know that you know how to solve this, it is much better than staying with my ignorance respect all that. Thank you for your enthusiasm on this. I'm sure you won't regret about all this.

Have an excellent day with the cascabel: https://www.youtube.com/watch?v=73eL52Q8W0M

Luis

 

0 Likes
Len_CONSULTRON
Honored Contributor II

Luis,

"You: state 7 is illegal and should never be present. However if for some reason it did, it must be resolved to one of the legal states.
Me: Then, what must I do to 'resolve' an illegal state to convert to the next legal state?"

My LUT already resolves state 7.  Done.

"You: My project gives you +/- 1.92233756... Hz resolution.
me: Wonderful!! But I don't know yet how to do it"

I provided a new version of the project that allows you to manually modify the Divider Register.  Done.  Study it.

"You: Changing the PLL output frequency from 78 MHz to 75 MHz...
¡Fabulous! But I don't know how to do it"

Simple "DWR/Clocks/Edit Clock..."

Len_CONSULTRON_0-1633745608567.png

 

About the UART:  You'll need a Terminal program for your PC to operate the commands. TeraTerm is a decent one.

I suggest studying the project.  I wrote it VERY simply. It should be fairly easy to follow.

Len
"Engineering is an Art. The Art of Compromise."
0 Likes
luisji
New Contributor II

Now I'm overwhelmed with about 12 interlaced programs in C and about 20 .h programs,  maybe the work of several persons, several improvements along months. 

There are two levels of handling it,

1 'as an operator' and 2. 'as a programmer'   

I aspire some day to  reach the 2nd level, but it would take me, I think, 2 o 3 months to understand just the most important reasons and algorithms behind this system.  But for now, thinking in just being able to use this software and psoc, I would aspire to handle several 'black boxes', in a relatively short time, but only if you help me to understand it.  In this moment I don't know how to interface with the terminal program you sugested.   I would even beg you to simplify it replacing the UART interface  with just the button in the Psoc, so, for instance, if the button is sustained 1 second the program make an increment to frequency and if the button is clicked a shorter time, the program make a decrement to frequency.  An the end, I'll not use not UART neither Button, but a  condition readed in a microphone trhough an ADC or maybe as an analog signal.   

So, Is it possible you help me with a general algorithm of all this, but in the most simplified form to access this as possible as 'black boxes'?  

When this project be working (and this shouldn't be too far as you say the signals are built and tunnable), I'd be able to pay for the guide to understand this system at a detail level, but for now I just have to put it to work, first the signals, then the sensors, and finally my control algorithm.  

Thank you for all the help you have given to me, and in advance for the help to come...

Luis

 

0 Likes
luisji
New Contributor II

Dear Consultron

I hope you be fine and  healthy, far away from covid and other bad spirits, because this project is depending on you,  as long as  you could help me to use the solution you proposed .   So be the force with you, and happiness, and love and all the good things of life...

Sincerely

Luis

 

0 Likes
Len_CONSULTRON
Honored Contributor II

Luis,

Thank you for the well wishes.   In these crazy COVID times,  I hope life finds you well also.

"Now I'm overwhelmed with about 12 interlaced programs in C and about 20 .h programs,  maybe the work of several persons, several improvements along months. "

The project I supplied only has custom .h (version.h) file and one custom .c (main.c) file.  It won't get any simpler than that.

The other .c and .h files found in the "Generated_Source" are created during the "Application Build" phase by the components and wiring shown in the  Topdesign and also from settings in the DWR.

Theoretically, these files allow your specific application to quickly and "easily" access the functions of these components.   This is part of the  "Black box" solution you are looking for.  These files shouldn't be modified by you.

"There are two levels of handling it,

1 'as an operator' and 2. 'as a programmer'   

I aspire some day to  reach the 2nd level, but it would take me, I think, 2 o 3 months to understand just the most important reasons and algorithms behind this system.  "

I understand you're not a programmer or not a strong programmer.  I'm happy to help without doing all the work for you.

I recommend you take my last version of the project and get it working using a Terminal program to control the resonance frequency.

This should manually test the basis of your idea to determine if "pipe" resonance can be found with your HW.

Question: What is your plan to detect resonance in HW?   A microphone connected to an ADC input?  You need a feedback signal that can be read by the PSoC.

Step 2:  Once you can manually achieve resonance and read a feedback signal value,  then you can manually read the value using the Terminal.

Step 3:  Once stimulus and feedback detection can be successfully determined manually, then you need to use the PSoC to automatically stimulate and stop when the resonance is detected and then push the result out to a terminal (or something more useful.)

Len
"Engineering is an Art. The Art of Compromise."
0 Likes
luisji
New Contributor II

Dear Len

> The project I supplied only has custom .h (version.h) file and one custom .c (main.c) file. It won't get any simpler than that.
That are very good news !

> The other .c and .h files found in the "Generated_Source" are created during the "Application Build"
OK

> I understand you're not a programmer or not a strong programmer. I'm happy to help without doing all the work for you.
I made MySQL-PHP programs of about 8,000 lines, but it is very different to C language, I have a little introduction to it. I have made programs with visual basic for applications, have interfaced a PIC with windows, and I was programming PIC uprocesors with PicBasicPro.

> I recommend you take my last version of the project and get it working using a Terminal program to control the resonance frequency.
But terminal add the UART component and an unneeded complexity, because at the end, what must be interacting with Psoc is an interfaced microphone.

Why don't we better try to do a simpler program

>This should manually test the basis of your idea to determine if "pipe" resonance can be found with your HW.
It is for sure that it is possible as the pipes are machined until they resonate at a known frequency, so, when we reach similar freq, they will resonate. The problem is that this freq. can change slightly with temp and other variables not fixed in time, so we have to have a system who seeks the freq. where the resonance is sustained, so to test it manually I don't know if it works as it would be maybe a slow response.

Question: What is your plan to detect resonance in HW? A microphone connected to an ADC input? You need a feedback signal that can be read by the PSoC.
I know, for previous works, that the hardware 'makes a noise' when comes in resonance, so, the difference between resonance and not is mainly the amplitude of a sound at an approx. freq.

So, the plan is to define a range (see attached graph), to scan it progressively and at the time it comes resonant, the amplitude of the noise (volume) coming from the hardware will grow enough to be noted between a range. Then, to sustain it, I'll be seeing the curve of amplitude vs freq, if its slope is positive, the program will still increase freq, if it becomes zero, I must stop in this freq. and if the amplitude decrease, I must return to previous frequencies, till slope returns to zero.
If I have an N freq fixed and the amplitude begins to decay, the program will have to seek if downing or going up the freq. the slope goes up or down, till it reach again 0 slope

If the response wouldn't be enough to stabilize the resonant status, I'd have to add proportional and/or integral factors to become a PID algorithm, but for now I think that only with derivative factor I'll have this controlled.

>Step 2: Once you can manually achieve resonance and read a feedback signal value, then you can manually read the value using the Terminal.
The problem is not to achieve resonance. If the response is manual, I think it could be difficult to sustain it, but although it be easy, it doesn't give me an advance in programming the system.

> Step 3: Once stimulus and feedback detection
Could you tell me what is understood as 'stimulus' here? How can I handle it with an API once understanding what I need?

> can be successfully determined manually,
As I told you, it is better to go on with the program than making human interfacing with this. And, I don't know how to use terminal to interface with psoc. Maybe there be a video tutorial about it.

So, have an excellent day.   

I'll be thankfully waiting for your answer.

Luis

 

0 Likes
Len_CONSULTRON
Honored Contributor II

Luis,

I'll try to answer your simpler questions first.

"Could you tell me what is understood as 'stimulus' here? How can I handle it with an API once understanding what I need?"

The generation of the 3-phase waves is the stimulus.  I'm then assuming you are sending these outputs through serial capacitors and then out to speaker(s) pointed at the pipes.

You're trying to create a stimulus/feedback loop to find the resonance.

"As I told you, it is better to go on with the program than making human interfacing with this. And, I don't know how to use terminal to interface with psoc. Maybe there be a video tutorial about it."

We have an oft-used riddle at my work: "How do you eat an elephant?  One piece at a time."

This riddle helped young engineers understand that in a system design (usually a large one) that you conceive the basic blocks of the system at a high level (the elephant) but you execute the implementation at a lower level (the pieces).  This means you first isolate the smaller pieces,.  For every piece, you design, develop (build), test, understand what might have gone wrong and then make the design corrections to make sure each piece operates as intended.

Once all the pieces are operating as intended, then you can "stitch" them together to provide the system design. This makes troubleshooting issues at this level usually easier since the "pieces" have been understood and generally working.

The fact that you want to go straight to the system level (automatic control) is admirable but ill advised if it can be avoided.  This is coming from a 36 year veteran of electronic HW and SW design.

"But terminal add the UART component and an unneeded complexity, because at the end, what must be interacting with Psoc is an interfaced microphone."

If you want to eliminate the Terminal interface you can.  You can replace it with two momentary push buttons.  One button for increment and the other for decrement the frequency.  The downside is you don't have a visual indicator of the resonance frequency.  The terminal interface uses keyboard characters to increment/decrement and provide the current stimulus frequency.

You still didn't answer my question:

Question: What is your plan to detect resonance in HW? A microphone connected to an ADC input? You need a feedback signal that can be read by the PSoC.

You tell me you're going to monitor the pipe's sound for the "noise" obtained with resonance.  You don't explain what you plan to use as a sound sensor device.

Right now, the project I provided uses your ears as the sound sensor and your hands (typing the increment or decrement characters on the keyboard using the Terminal interface) as the crude but effective resonance scanning feedback loop.

Until you are confident in your manual "piece" implementation, it would be ill-advised to jump directly into the fully automatic implementation.

Back to my question about the sound sensor.  Once you have detected some sound, how do you plan to get it into the PSoC.  Normally sounds comes in waves, these signals usually show up as = and - to GND.  This signal usually needs to be level shifted above GND for the PSoC (powered with +5V to GND) to see the full wave.

 

Len
"Engineering is an Art. The Art of Compromise."
0 Likes
luisji
New Contributor II


"Could you tell me what is understood as 'stimulus' here? How can I handle it with an API once understanding what I need?"

> The generation of the 3-phase waves is the stimulus. I'm then

>assuming you are sending these outputs through serial capacitors

>and then out to speaker(s) pointed at the pipes.
Not exactly. The pipes, some inside of others, act as capacitors, and will resonate at certain frequency. In fact, the frequency emitted by the Psoc has to be amplified and go to an LC circuit (where C are the isolated pipes), so I'll have 12 volts and some current to be determined yet, where I hope current will decrease exactly when resonance be acomplished.

>You're trying to create a stimulus/feedback loop to find the
> resonance.
Yes

> "As I told you, it is better to go on with the program than making
> human interfacing with this. And, I don't know how to use terminal

> to interface with psoc. Maybe there be a video tutorial about it."

> "How do you eat an elephant? One piece at a time."
>...you first isolate the smaller pieces,... you design, develop (build),

> test... This makes troubleshooting issues at this level usually easier
>...This is coming from a 36 year veteran of electronic
OK. The problem is that I know already that resonance is not easy to be sustained manually, so when it 'appears' it is not a stable phenomenon. I know that resonance has to be produced near of 4,700 Hz, so if I scan the range slowly, necessarily will appear, but the problem is not to make it resonate, but sustain it, knowing that a fixed frequency doesn't sustain it (but knowing too that the change in freq is not big). If I loose it and find it again manually, I think it doesn't tell me much about how do I have to program the automatic stage. Maybe I'd have to make a register in memory writing amplitude, freq, and time (in fixed periods of time) of some last seconds (rewriting to use a limited quant. of memory) in order to analyse how it is behaving.

So, if  you still think that the manual stage is a most, I'll do it.

> If you want to eliminate the Terminal interface you can. You can
> replace it with two momentary push buttons. One button for
> increment and the other for decrement the frequency.
>The downside is you don't have a visual indicator of the resonance

> frequency.
The sound is an audible indicator of the resonance

> The terminal interface uses keyboard characters to

> increment/decrement and provide the current stimulus frequency.
This is something already designed? Where can I see these key assignments? Or is something I'd have to implement?

> You still didn't answer my question:
> Question: What is your plan to detect resonance in HW? A
> microphone connected to an ADC input? You need a feedback
> signal that can be read by the PSoC.
A simple amplifier, maybe as the one in the attached image, but not exceeding 5 volts.

> You tell me you're going to monitor the pipe's sound for the "noise"

> obtained with resonance. You don't explain what you plan to use
> as a sound sensor device.
I was thinking on an ADC receiving the amplified signal of the microphone. Then, I'd apply what I stated in previous message, that in the graph.

So, What do you think?
Thank you very much.
Have a nice day
Luis

 

0 Likes
Len_CONSULTRON
Honored Contributor II

Luis,

Thank you for your description of your pipe system.

My suggestion for manual control of the output frequency is to "eat  onlythe piece" of verifying your stimulus is working well enough.   Since you can hear if resonance is achieved, you can manually increment or decrement the stimulus frequency and hear it.  Even if in time it changes, you have proven that the stimulus is doing it's job.  One piece "eaten".

Yes.  The project I provided has keyboard control of the stimulus frequency with a visual display of the frequency.

Typing a '-' character decrements the frequency by 2 Hz.

Typing either a '+' or '=' character increments the frequency by 2 Hz.

Have you tried the project with Terminal control?  This is not an end-product but a very good starting point and proof of concept.

Input feedback

I've seen your schematic for the condenser mic amplifier.

Using the manual control of the project I provided with your mic input circuit, you can troubleshoot the input phase of the program.

You can find a way to determine the amplitude using the PSoC ADC to determine peak and you can alter my project to display this amplitude every 100ms.

Putting it all together

Once you've proved the output does what is is suppose to do and that the input provides useful values then you can create a SW algorithm to switch from manual to automatic control.

In my experience, it is best to "unit test" each piece of the system separately and get them working individually.  This makes it easier to troubleshoot when you finally put all the piece together.

Len
"Engineering is an Art. The Art of Compromise."
0 Likes
luisji
New Contributor II

Dear Len

I delegated some part of the mechanical parts, but I have to be there if I want it solved.   The thing is that the workshop where I have my little lathe is about 50 minutes from here and I have to make appointment with the operator I have confidence with, that's why I want to have the electronic part solved before. 

But what can I test before is that I have the control over the frequency and then go to finish the mechanical part, which has yet some things to do.  I'll print3D some parts, and I have to buy some hoses and connections, and some wires to do coils and then put it all together.   I'll make a PCB to have some connections and complements to Psoc  (curiously I didn't find some specific holes to hold the psoc)  and I'll make 3Dprinting a little cage to put the Display, and some controls.   

So, I'll try to do what you say and will be soon in contact.    It is yet to come the other sensors part.  

Thank you again

Luis

 

0 Likes
Len_CONSULTRON
Honored Contributor II

Luis,

Thank you for the explanation for the dilemma of not having the actual mechanical parts to work with.

Step 1: Test the Stimulus Output

In lieu of the actual "pipes" it is a very good idea to have a simulated environment.  

Use a scope to check to make sure the 3-phase output is correctly working to spec.  This also means using the Terminal keyboard control I provided to make sure with incrementing and decrementing the frequency is correctly adding or substracting 2 Hz.

This does not test the capacitance effect of the pipes but probably gets you 60% there in the troubleshooting.

Add a speaker to one of the 3-phase outputs (through a serially connected cap (~100nF is my guess).  

The speaker should sound at the stimulus frequency.  This is to be used for the next step.

Step 2: Test the Feedback Input Circuit

Build your feedback input circuit with the condenser mic.  The mic should be near the speaker from step 1.  Using the scope to monitor the circuit's output.

Here are some unit testing criteria:

  • You should see something  between a squarewave and a sine wave for an output.   
  • Make sure the frequency changes when you change the stimulus frequency.
  • Make sure the output amplitude is approximately as high as you need.
  • Make sure the output doesn't clip on the top or bottom of the wave.  (Clipping will most likely causing some measuring distortions.)

Step 3: Test the ADC circuit connected to the Feedback Input Circuit

Attach a PSoC ADC component to the feedback input circuit and perform your determination of AC amplitude.  (I'm assuming you are performing a RMS or probably less accurate peak +voltage detection) for your resonance detection.

I recommend that you modify my project to add the ADC and to display the ADC peak detection value to the Terminal at about a 100ms interval.

Step 4: Test the Resonance Detection Algorithm

Since you don't have the pipes yet but you do have a working speaker connected to the stimulus output, you should be able to place a sound deadening device (pillow?)  between the speaker and the mic.  This should emulate a 'resonance' event when the "pillow" is fully removed and the full amplitude of sound is able to reach the mic.

Len
"Engineering is an Art. The Art of Compromise."
0 Likes