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PSoC 5, 3 & 1 MCU

Aswinpk94
New Contributor

Hi

I was planning to perform square wave voltammetry on a three-electrode configuration system. In square wave voltammetry, a symmetric square wave is superimposed with a staircase potential and then applied to a stationary electrode. I have decided to choose the PSoC 5LP board for this purpose. Therefore, can anybody provide any feedback or suggestions based on this? Is this board feasible to perform the experiment?

Thanking you

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1 Solution
Len_CONSULTRON
Honored Contributor II

Aswin,

I have modified the project I provided earlier to more closely match the new requirements:

"The maximum current that needs to be sourced is mA at most. If it is a problem, then maybe 100uA.
as per requirement, each pulse is 50mV height, 25ms wide, applied in 5mV increment, with voltage resolution as -1 to +1V."

I added an ADC and compute an average Isense current for the circuit.

Attached is the modified project.  I have not tested the project with the external resistors and connections.  It does compile.

 

 

Len
"Engineering is an Art. The Art of Compromise."

View solution in original post

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16 Replies
Len_CONSULTRON
Honored Contributor II

Aswinpk94,

Hi.  I'm not familiar with Squarewave-stairstep voltammetry but I did look it up.

I'm confident the PSoC5 can be a part of your system.

I do have a few questions:

  • What is the minimum voltage between the stationary probe and reference probe?
  • What is the maximum voltage between the stationary probe and reference probe?
  • What is the maximum current that needs to be sourced between the stationary probe and reference probe?
  • For the squarewave edges, what is the maximum rise time and fall times allowed.
  • What is the maximum frequency you need to drive the squarewave?
  • What is the required voltage accuracy needed?  (Ie. +/- 1%)
  • What is the voltage resolution needed?

Here is a quick summary of the PSoC5LP capabilities in your application for stair-stepped squarewaves.

I would assume the simplest implementation is to use a VDAC8 component.  The VDAC8 if properly configured can operate with 256 steps (8-bit DAC) between 0.0V to 4.08V with 16mV/step resolution.  Using specific pins for the output, you can source up to 25mA.

If you need higher (>4.08V) or lower (<0.0V) voltage or more current, you will need to consider an external Opamp with some gain and possible offset.  The PSoC5LP can use the VDAC8 to source the input to the external Opamp.

The PSoC5LP also has a WaveDAC8 component.  It is basically a VDAC8 with a means to output a waveform defined by you (equivalent to a Arbitrary Waveform Generator [AWG]) using internal DMA resources.  This would be a good option if the waveform is always the same.   If not and if the Squarewave frequency is not too fast, you can use SW or your own developed HW state-machine to drive the VDAC8 through its steps.

Getting started with the PSoC5LP can be fairly inexpensive.  I've purchased a really useful low-cost PSoC5LP kit (CY8CKIT_059) from distributors such as DigiKey and Mouser here in the US for about $15.00.

Len
"Engineering is an Art. The Art of Compromise."
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Aswinpk94
New Contributor

First of all, thank you for finding time for this.

Now, I am doing this as part of my project and it hasn't been done before. So, I am new to this topic.

but, I just assumed a few values

potential range between -1000mV to +1000mV.

step size = 5mV per cycle

time = 25ms.

plot height around 50mV

Hence, a signal with these boundary conditions is applied to the stationary electrode.

Current may be sampled at every 4 ms.

 

These values are assumed. So, it can be changed if needed.

 

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Len_CONSULTRON
Honored Contributor II

potential range between -1000mV to +1000mV.


If you MUST provide a voltage negative to GND (-1000mV) then you most likely will need to to use an external Opamp with a bipolar supply (ie: +5V and -5V).

There is a way around this if you know have to create a different GND potential for your GND electrode compared to your PSOC GND (VSSA).  In this case you can use the VDAC output directly without possible need of an external Opamp.


step size = 5mV per cycle

 


The VDAC8 has 256 DAC counts to work.  It has two output ranges: 0V to 1.02V and  0V to 4.08V.

The 1.02V range has a DAC count resolution of 1mV/count and the 4.08V has 16mV/count.

The VDAC8 range of 1.02V can used to the ext Opamp with a gain of 2.  This would give you +/-2mV/VDAC8 count.


time = 25ms.

 


Not too fast.  This is probably doable in SW.


plot height around 50mV

 


What does plot height mean in this context?


Hence, a signal with these boundary conditions is applied to the stationary electrode.

Current may be sampled at every 4 ms.

 


With the appropriate value sense resistor, this 4ms sample rate is achievable by the ADCs on the PSoC5LP.

You still didn't answer the following questions:

  • What is the maximum current that needs to be sourced between the stationary probe and reference probe?
  • For the squarewave edges, what is the maximum rise time and fall times allowed.
  • What is the maximum frequency you need to drive the squarewave?  I'm assuming 80 Hz (2/25ms)
  • What is the required voltage accuracy needed?  (Ie. +/- 1%)
Len
"Engineering is an Art. The Art of Compromise."
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Aswinpk94
New Contributor

thank you for the reply.

the -1000mV to +1000mV was an assumption and that should be enough. But if it is possible, then maybe +/-5 V

 

Now, the maximum current that needs to be sourced is mA at most. If it is a problem, then maybe 100uA.

as I said, the pulse width is about 25 ms. So, a decent definition of the square wave is required. I think rise time should at least be 100x faster. What do you think?

I think we generate square in Fourier series of sines, so the rise time will define what the highest frequency will have to be, isn't it?

steep sizes of 50mV. step size 5ms. voltage accuracy, as you said, could be +-1%. I have to look at that.

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Len_CONSULTRON
Honored Contributor II

Aswin,

Do you already have a PSoC5LP kit or evaluation board?  If so, what type?

Do you have access to an oscilloscope?

Len
"Engineering is an Art. The Art of Compromise."
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Aswinpk94
New Contributor

I have given it for purchase. It will be delivered soon. It is PSoC 5LP CY8CKIT-059.

I have access to an oscilloscope.

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Len_CONSULTRON
Honored Contributor II

Aswin,

I have attached a project for the CY8CKIT-059 that gives you an example of a Squarewave-Stairstep output from this kit.  If you buy a different PSoC5LP kit, it can be adapted fairly easily.

The project has two outputs:

  • Vout (P0.1) = The Voltametry output with a squarewave and stairstep pattern that repeats.
  • V_sensor_GND_ref (P0.0) =  This is about 2.0V.  Using  this output and the sensor GND to offset Vout by about 2.0V to provide a -2V to +2V output to the sensor.

The step data can be changed by you.  I included two files in the project Voltametry.xlsx to allow you to program the desired waveform.  Then you would generate a CSV version of it for use with the main.c file as a data input for the voltametry table.

Note: My measured rise and fall times are < 2us.  However I have no significant load.  It might be different on your system.

Here is a scope plot of  my results using Vout as the input and V_sensor_GND_ref as my measurement GND.

Len_CONSULTRON_0-1627316591756.png

Before I forget, I'm using a Dithered VDAC component with 12 bits of resoultion.

This allows me to provide a +/- 1mV voltage resolution!

 

Len
"Engineering is an Art. The Art of Compromise."
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Aswinpk94
New Contributor

Thank you so much for your guidance. It is really helpful. Learning a lot already from these conversations.

I shall look into this and understand the working of the project.

What was your step size? How to vary step size?

How did you measure rise and fall times?

What is dithered VDAC?

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Len_CONSULTRON
Honored Contributor II

Aswin,


What was your step size?

25ms (as per your requirements) per change in output voltage.


How to vary step size?

I used the table of values found in voltametry_step_tbl[] to generate the step values.

I used the System Tick resource (systick) which interrupts once every 1ms.  In the interrupt service routine, I increment a variable once every 1ms until I reach the target step time (in this case VOLTAMMETRY_STEP_TIME = 25 => 25ms).  When this count is reached, I flag the application in the main() task to change the DVAC12 to the next step value in the table.


How did you measure rise and fall times?

 With an oscilloscope.


What is dithered VDAC?


It is a component in the PSoC Library  that uses the VDAC8 with a DMA to toggle the VDAC8 set value +0 or +1 counts using a pattern in time.  Effectively this 'trick' allows to VDAC8 to become the equivalent of a 9-, 10-, 11- or 12-bit VAC.  Since the VDAC8 (8-bit resolution) in the 4.08V range has 16mV resolution and you wanted 5mV resolution, I chose the 12-bit.  This allows a 1mV resolution.  More than enough to meet your 5mV resolution requirement.

Len
"Engineering is an Art. The Art of Compromise."
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Aswinpk94
New Contributor

I have received the board. I tried running your project, but showing errors.

1) unable to find component "cy_boot_v6_10"

2) can't find project.h

subfiles under the generated source - PSoC5 - are all hidden and showing the error PSoC creator error fmk.M0010. unable to load from disk.

none of the header files and other files in that folder can't be read.

 

To obtain -5V to +5 V potential range, an op-amp is to be used? How to calculate its gain for the required specifications?

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Len_CONSULTRON
Honored Contributor II

Aswin,

The issues you are having should be simple solves.  You wrote:


1) unable to find component "cy_boot_v6_10"

 

 The cy_boot file you have in your Creator is a bit older than mine.   Here is how you acquire the one I'm using:

  • At the bottom right side of the Creator window you should see a small icon like: Len_CONSULTRON_0-1627994200561.png

    This tells you that one or more of the components are not up to date for the project.  In your case, you need to update the cy_boot component.

  • Click on Len_CONSULTRON_1-1627994282906.png .     

     

    You should see something like:
     Len_CONSULTRON_2-1627994342921.png

     

    The components in the project that might use updating are listed in the "New Version" column and are BOLDED.
  • Click on "Next >".   This will go to the Cypress site to pick up the new versions of the components an load them into your PSoC Creator install location to use with this and later projects.   
  • You should see another window which confirms your selection.  Select "Finish".
    Len_CONSULTRON_3-1627994671874.png

     

  • Next you will be asked if you want to archive the current project before changing to the new component versions.  Select "Cancel" (this means NO don't archive").
    Len_CONSULTRON_4-1627994889871.png

     

  • When it is completed, you should see "----------------Components are updated successfully---------------" displayed in the "Output" console window.
  • You should be able to now build the project using Len_CONSULTRON_5-1627995001467.png

You wrote:


2) can't find project.h

Once the cy_boot is updated and you have a success build, you should have the "project.h" generated.

You wrote:


subfiles under the generated source - PSoC5 - are all hidden and showing the error PSoC creator error fmk.M0010. unable to load from disk.

none of the header files and other files in that folder can't be read.

 

 What you were seeing is that these support files in the "Generated_Source" directory were not there because your project could not be built because the missing cy_boot component needed to be updated.

It probably looked something like:

Len_CONSULTRON_6-1627995335069.png

Once this component was updated, you can build the project and generate these files.  It should then look like:

Len_CONSULTRON_7-1627995400722.png

You wrote:

To obtain -5V to +5 V potential range, an op-amp is to be used? How to calculate its gain for the required specifications?


The project I supplied provides a -2V to +2V range using my "false" analog GND called "V_sensor_GND_ref".  This is the maximum voltage limit of the PSoC5.  However you can use this output to source to an external opamp with a gain of 2.5.  (ie -2V/+2V x 2.5 => -5V/+5V)

 

Len
"Engineering is an Art. The Art of Compromise."
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Len_CONSULTRON
Honored Contributor II

Aswin,

Has my post about updating the component (specifically cy_boot) helped to resolve the build issue?

Len
"Engineering is an Art. The Art of Compromise."
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Aswinpk94
New Contributor

Yes, the problem is fixed. Now I am learning about the code, different libraries etc. I am thinking about using the BLE module in the project. Also, to source it to the opamp to obtain -5/+5 V range.

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Aswinpk94
New Contributor

The generated waveform is applied to an electrode. Then the current is measured in both forward and backward pulses. The data obtained is to be transferred to a phone . Therefore, is it possible with the PSoC BLE pioneer kit or HC-05 module or only one of them?

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Len_CONSULTRON
Honored Contributor II

Aswin,

I have modified the project I provided earlier to more closely match the new requirements:

"The maximum current that needs to be sourced is mA at most. If it is a problem, then maybe 100uA.
as per requirement, each pulse is 50mV height, 25ms wide, applied in 5mV increment, with voltage resolution as -1 to +1V."

I added an ADC and compute an average Isense current for the circuit.

Attached is the modified project.  I have not tested the project with the external resistors and connections.  It does compile.

 

 

Len
"Engineering is an Art. The Art of Compromise."

View solution in original post

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odissey1
Honored Contributor II
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