Signal Routing

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Anonymous
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Looking over the application note AN58304 (www.cypress.com/) I saw that IDACs had dedicated pins, but it does not mention VDACs having dedicated pins. Looking at figure 2 it shows the VIDACs as one component, so does this mean that they share that dedicated pin? If not does this mean my best option for routing to a VDAC is to use a global?

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ETRO_SSN583
Level 9
Level 9
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IDACs, from the datasheet -

   

 

   

Iout – Analog

   


The Iout terminal, the terminal on the right side of the symbol, is the connection to the DACís
current source/sink. It can be routed to any analog-compatible pin on the device. When the
highest current range is selected (2040 µA), the output should only be routed to a specific set of
pins that provide a direct low resistive path. These port pins are P0[6], P0[7], P3[0], or P3[1].

   

 

   

VDACs, from datasheet -

   

 

   

Vout – Analog

   


The Vout terminal is the connection to the DACís voltage output. It may be routed to any analog-
compatible pin on the PSoC.
Note The VDAC, when driven to a pin, cannot drive a value that exceeds the VDDIO for that pin.
To get the result you want, set the correct VDDIO supply.

   

 

   

Regards, Dana.

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Anonymous
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Ah ok, so I guess they just implemented the direct routes for the IDACs to help with the voltage drop.

   

Thanks Dana 😃

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Anonymous
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 Typically VDAC outputs will be given as an input to High Imp inputs (like OpAmp). So there won't be voltage drop across the routing resistors. Whereas IDAC will typically drive some resistive loads. So there is a high possibility of some voltage getting dropped across the internal routing resistors. Remember that there is a min Compliance voltage spec for IDACs.

   

 

   

If you VDAC is driving some resitive loads, then make sure to select the least routing resistance path. Using Creator 2.1, you can find out the internal routing resistance using ohm-meter.

   

 

   

Regards,

   

Kishore.

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