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PSoC 5, 3 & 1 MCU

Anonymous
Not applicable

Hi there,

I'm trying to communicate with an external ADC. Therefore I use SPI with manual SS control. To emulate the ADC a took a SPI slave next the SPI Master on the top design. When setting the clock speed to 1kHz, I see the expected result on the LCD, but when increasing the speed to 1MHz or higher I get corrupted data.

I attached my workspace bundle and a picture of my setup wth the expected result on LCD. It would be nice if someone could take a look at my code and eventually find my mistake.

Greetings from Fabian

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2 Replies
Valued Contributor

Hi,

Sorry for the late reply, may be you already fixed the problem but any way i write here what i found about your project.

1. The reset signal (in both components) is not connected to anything, this must be connected to a logic 0.

2. The MOSI_M signal is routed to the P3_2 pin, this pin has a CAP connected to it, you should route this signal to anywhere else. The following image is from the CY8CKIT-059 kit schematic available in the instalation location, in my case here C:\Program Files (x86)\Cypress\CY8CKIT-059\1.0\Hardware

ca_in_p3_2.png

3. This is personal preference, but i configured the CS_M to have a pull-up.

4. You forgot to put the CS_M low in the while (flag<2) loop, right at the beginning, before the SPI_M write.

5. I have not a LCD but i used a UART to see the results, find the project attached.

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Anonymous
Not applicable

Hi,

The first problem is that the CS_M line is lowered after you send data from line 46 to 51.

The second thing that should be done is wait for the SPI_DONE flag  like at you did at line 30. Copy line 30 to line 52.

Move the line 54 just before line 46.

Here is the modified code:

/* SPI Example */

#include <project.h>

uint8 flag = 0;

uint8 Slave_RX[8];

uint8 Master_RX[8];

int main()

{

    uint8 i = 0u;

    CyGlobalIntEnable;

    LCD_Start();

    SPIM_Start();

    SPIS_Start();

    CS_M_Write(0x01);

    CyDelay(100);

    CS_M_Write(0x00);          //Chip Select = 0

    CyDelayUs(1);              //Warte für td(CSSC)

    SPIM_WriteTxData(0x06u);    //ADC Reset Command

    SPIM_WriteTxData(0x43u);    //WREG Command

    SPIM_WriteTxData(0x08u);

    SPIM_WriteTxData(0x04u);

    SPIM_WriteTxData(0x10u);

    SPIM_WriteTxData(0x00u);

    SPIM_WriteTxData(0x00u);    //Start Sync Command

    while(!(SPIM_ReadTxStatus() & SPIM_STS_SPI_DONE));

    CS_M_Write(0x01);

    CyDelay(1);                //td(SCCS)

    for(i=0u; i<8u; i++)

    {

        Slave_RX = SPIS_ReadRxData();  

    }

    SPIM_ClearRxBuffer();

    SPIM_ClearTxBuffer();  

    SPIS_ClearRxBuffer();

    SPIS_ClearTxBuffer();

    while(flag<2)

    {

    CS_M_Write(0x00);

    SPIM_WriteTxData(0x08u);

    SPIM_WriteTxData(0x04u);

    SPIM_WriteTxData(0x10u);

    SPIS_WriteTxData(0x55);

    SPIS_WriteTxData(0x66);

    SPIS_WriteTxData(0x78);

    while(!(SPIM_ReadTxStatus() & SPIM_STS_SPI_DONE));

              

    CyDelay(100);                  //Wait for 24 Rising Edges

    CS_M_Write(0x01);

    CyDelay(1);

    flag++;

    }

    for(i=0u; i<8u; i++)

    {

        Master_RX = SPIM_ReadRxData();  

    }

    LCD_ClearDisplay();

    LCD_Position(0u,0u);

    for(i=0u; i<8u; i++)

    {

        /* Read from SPIS Rx software buffer */

        LCD_PrintHexUint8(Slave_RX);  

    }

    LCD_Position(1u,0u);

    for(i=0u; i<8u; i++)

    {

        /* Read from SPIM Rx software buffer */

        LCD_PrintHexUint8(Master_RX);  

    }

    while(1u){;}

}

Regards

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