Reset detection using timer

[rosh_888]

I am using a timer to detect a reset signal of 500us and then give a presence (in an interrupt)(this is a 1-wire communication) , the problem i am facing is that when i given in some other commands after this reset signal at times i am not able to either detect the reset and give presence or the presence is given in between the commands. (I use psoc lp 5)

The timer config as:

trigger: at falling edge

capture: raising edge

interrupt on capture

CR: this is the control reg to reset the timer block inside the interrupt

both the control reg and timer block are connected to 4MHz clock

24bit, period of: 16777216

I don't know the mistake i am doing in this case. Here is my isr:

CY_ISR(isr_1_Handler)
{

Count =Timer_INIT_PERIOD-Timer_ReadCounter();

if(Count>480*4)
{
CyDelayUs(15);
TX_Write(0);
CyDelayUs(102);
TX_Write(1);
CyDelayUs(2);

}
else if(Count>65*4 && Count<75*4)
{
CyDelayUs(2);
TX_Write(0);
CyDelayUs(11);
TX_Write(1);
CyDelayUs(2);
}

CR_Write(1);
}

Note: I tried adding in a flag inside the interrupt and giving the presence outside checking the flag and in that case it missed the resets even when only resets where given without any commands.

I am attaching master code that i used to generate the resets and command and also the timer code (this timer code doesn't do anything other than giving a presence whenever a reset is detected)

Have been trying it out for a long time and am getting errors when i haves huge cycles as 500 times 6 errors, when u run these in two codes in two different psocs u can see the issue. Any help would be great !

[ncbs]

Hello @rosh_888 ,

As per my understanding, the master project is on PSoC5LP_1(1st device) and the timer project is on PSoC5LP_2(2nd device).
The master provides the reset signal through P1[7] to PSoC5LP_2. PSoC5LP_2 receives the reset signal on P12[5] and is given to trigger and capture.
When the reset signal duration is for 500us, you are trying to send back a pulse in the ISR from PSoC5LP_2(P12[4]) to PSoC5LP_1(P1[6]). Is this pulse the "presence" that you are trying to indicate?

The timer is reset at the end of ISR with the help of CR.
Let us know if the above description is correct.

To eliminate the delayed response from PSoC5LP_2, try setting maximum priority for the ISR.

Regards
Nikhil

[rosh_888]

Yes you are right with the description I did that too (set the ISR priority high) and still facing the error

[ncbs]

Hello @rosh_888 ,

Check the UART functionality alone.  The UART configurations in the projects differ from each other. Try changing parameters such as buffer size, enabling an interrupt, and setting priority. You may refer to “UART_Full_Duplex” code example in PSoC 5LP Device Family. Again, check the functionality of GPIO alone.

In instances where the reset signal from master is missed by PSoC5LP_2, check if the timer had been reset properly before entering a fresh cycle; because then the “Count” variable in the Timer ISR would be a non-desired value, and a desired pulse ("presence signal") will not be generated.

You may try the following approach to solve the delayed response issue: Define an interrupt for the TX GPIO too (in PSoC5LP_2). GPIO signal may be prioritized ahead of other communications, provided that is the time critical signal.

Regards
Nikhil

[rosh_888]

Instead of the timer (capture and trigger) I am able to get the result with two interrupts (in the GPIO line) but these are affecting the polling that I do further in the code, is there a way to use the timer efficiently so that I can just avoid the missing of resets and wrong values of count

[ncbs]

Hello @rosh_888 ,

The ISR has CyDelayUs() function being used to generate a pulse and this accounts for a significant amount of time (when compared to 500us). If any new reset pulse occurs when the ISR is being executed, then that reset pulse will not be detected.

Hence there is a minimum time gap that needs to be maintained in order to detect all the reset pulses in your application.

Regards 
Nikhil

[rosh_888]

I am setting a flag inside the interrupt and giving the presence outside, with this case also i am missing a few resets, i found that the timer is not getting reset and has some values in the count (6 out of 500 cycles). With the two interrupt case this error is avoided . Can you tell me what went wrong with the timer because the logic works most of the time. Further down the code i will be doing some polling so when using two interrupts i have do disable it and that adds some constraints.

[ncbs · Accepted solution]

Hello @rosh_888 ,

The 2 interrupt approach- have you defined the interrupt for pin_1 or TX in PSoC5LP_2? Did you define interrupt to pin_1, then enter ISR, and trigger timer by software APIs, and then send a "presence" signal back in the same ISR?

Reset signal from master - are you ensuring that the reset pulses are well spaced? 
Explanation - suppose reset signal has been detected by the timer in PSoC5LP_2, it would have entered ISR execution. If a fresh reset pulse arrives PSoC5LP_2 while ISR is being executed, then that fresh reset signal is bound to be lost/ignored.

if(Count>480*4)
{
CyDelayUs(15);
TX_Write(0);
CyDelayUs(102);
TX_Write(1);
CyDelayUs(2);
}

ISR entering the above section is the worst delay case. The minimum time spent inside ISR is 15+102+2=119us. Plus some time is required for context switching to and from the ISR. If a fresh reset signal comes before the end of the total ISR time, it is bound to be lost.

Flag method- even the flag method may sometimes not work as in addition to the above time, additional time is required to call the reset_detection() function and execute it. Hence this method is not advisable.

Regards,
Nikhil

[rosh_888]

In the two interrupt approach, i am adding two interrupts in the pin_1 (as this is the one wire receiving pin) and using it to find the raising edge(here the timer is stopped and reset , count value taken -if in range flag set) and falling edge(timer is enabled here) and the flag method is like i just set a flag inside the isr if it is in the range and i call the reset_detection(gives the pulse and sets the flag to zero) function inside the main function inside an infinite for loop.

when i use just the timer, the error comes when i have some other commands that are like having 60us of width.., regarding spacing, i give enof in the master function(after a reset it waits for 200 us for presences)

[rosh_888]

psoc 1- master gives reset and some command 

psoc 2 - slave that just gives a presences for reset

i get missing resets u can see that in uart

have given enof time delay in master to wait for a presence

[ncbs]

Hello @rosh_888,

The following blog discusses the usage of timer: https://iotexpert.com/psoc-5-timer-circuit-debug/ 

Regards,
Nikhil