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In order to reduce power consumption as much as possible in a CY8C20xx7, the device will repeatedly make measurements and then enter sleep mode for a while. What hardware can be switched off while sleeping and then quickly switched on to make measurements? Specifically the control bits cleared in CSDPLUS_Stop. Also how much power is reduced and are there any issues, delays or reinitializations needed for the following components cleared in the stop function:
; and reg[AMUXCFG], ~0ch; Disconnect internal capacitor
and reg[`@INSTANCE_NAME`_CapSense_CR2_REG], ~`@INSTANCE_NAME`_CS_CR2_INIT; Disable precharge switching and disconnect IDAC
and reg[`@INSTANCE_NAME`_CapSense_CR0_REG], ~08h; Disable CSDPLUS mode
and reg[`@INSTANCE_NAME`_CapSense_CR3_REG], ~`@INSTANCE_NAME`_CS_CR3_INIT; Power down and disconnect VRef Buffer
That document doesn't seem to handle the CY8C20xx7. Instead it covers Associated Part Family: CY8C21x23, CY8C21x34, CY8C21x45, CY8C22xxx, CY8C23x33, CY8C24x23A, CY8C24x94, CY8C27x43, CY8C28xxx, CY8C29x66
In any case, what analog components can be powered down then powered up without affecting capsense? I'd expected the analog block references would be reset, but what about the analog output buffers and CT/SC blocks? Also, what time delay is needed between powering them up and using them? This isn't mentioned in any of the documents I've read.