Strictly necessary cookies are on by default and cannot be turned off. Functional, Performance and Tracking/targeting/sharing cookies can be turned on below based on your preferences (this banner will remain available for you to accept cookies). You may change your cookie settings by deleting cookies from your browser. Then this banner will appear again. You can learn more details about cookies HERE.
Strictly necessary (always on)
Functional, Performance and Tracking/targeting/sharing (default off)
I am attempting to transfer data from an ADC, to a filter bank, and then to SRAM usign DMAs. I started the project by using the filter bank example project. Data does move through each perepherial however the results being written to memory are incorrect.
Please assist me in correcting the DMA configuration (or other flaws) that are causing the weird behavior. The program is setup right now so a break point hits after the data buffer fills off the filter.
I should say that it is difficult to deduce from Cypress's documentation how to configure the DMA's to properly transfer information from the ADC, to the filter, then to RAM in this circumstance. The DMA wizard is supposed to help but seemingly complicates things more. I am very confused on how to set this up (missing a bunch of puzzle pieces).
I guess the example EP58353 might also help - it shows how to get data in and out of the filter block.
You need to look, mostly, into the CyDmaTdSetConfiguration API call, maybe also at the DmaInitialize calls (e.g. your second DMA moves 4 bytes per request out of the filter, whereas the fuirst DMA puts single bytes into the filter...)