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PSoC 5, 3 & 1 MCU

New Contributor

There is no configuration for Capture mode in the PWM_Init() function, there does not seem to exist any bits in the Control register to configure the edge of the Capture as opposed to the Counter module (see Datasheets), the PWM module does not work as expected when capturing events in Either edge mode.

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Honored Contributor

Hi,

I've tested the PWM v3.30 component in test code. Capture mode with edge parameters does work.  Attached is the very simple test code.

However, you are correct, there is NO API call to set the capture edge programmatically.

My test code pre-sets all three edge types for three individual PWMs.  Additionally since the "FIFO not empty" status doesn't work, you have no means to notify the SW when a capture occurred except for setting an ISR on the capture input.

Len

Len
"Engineering is an Art. The Art of Compromise."

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Honored Contributor

Hi,

You are correct.  SW controllable access to Capture features are non-existent.  With the exception of ReadCapture(), the component and API calls only allow for initial configuration of the component at Build time.

However, when I performed a code review of the PWM_init() code and the PWM.h file, I could not see any setting of capture input mode settings such as Rising, Falling or Either edges.  I suspect this was a "wish list" feature by Cypress that never got implemented.

Does the capture input actually work on Rising edge for you?  I see no control SW to enable capture mode settings at all.

The PWM datasheet provides some ambiguous information about capture mode.

"PWMs, timers, and counters share many capabilities, but each provides specific capabilities. A Counter component is better used in situations that require the counting of a number of events but also provides rising edge capture input as well as a compare output. A Timer component is better used in situations focused on timing the length of events, measuring the interval of multiple rising and/or falling edges, or for multiple capture events."

It appears to hint that not all compare edge capture features work on this component configuration.

Maybe Cypress can weigh in on this.

Len

Len
"Engineering is an Art. The Art of Compromise."
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Honored Contributor

Hi,

I've tested the PWM v3.30 component in test code. Capture mode with edge parameters does work.  Attached is the very simple test code.

However, you are correct, there is NO API call to set the capture edge programmatically.

My test code pre-sets all three edge types for three individual PWMs.  Additionally since the "FIFO not empty" status doesn't work, you have no means to notify the SW when a capture occurred except for setting an ISR on the capture input.

Len

Len
"Engineering is an Art. The Art of Compromise."

View solution in original post

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