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PSoC 5, 3 & 1 MCU

New Contributor

Hello, I have attached a project where I am interfacing with an SI 7023 https://www.silabs.com/documents/public/data-sheets/Si7023-A20.pdf humidity/temperature sensor and capturing the PWM signal.

I have encountered two issues that I am seeking assistance with. I am using the CY8CKIT-059 prototyping kit.

Without the glitch filter, I am seeing what appears to be a behavior such as capturing on an incorrect rising/falling edge. I do not experience this problem when using an on-board PWM. I have viewed the signal both through an oscilloscope, Saleae Logic 16 Pro (Analog and Digital) and do not see evidence of any glitches after manual review. I notice this happens consistently with any external PWM source.

Normally in the project, my input comes from a digital input, but have disabled that for the example and used a PWM instead.

Any assistance is greatly appreciated.

Thanks,

Karl

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Honored Contributor II

I believe that double-sync will delay input pulse by 2 BUS_CLOCK cycles. It

is not always necessary to enable it.

/odissey1

On Wed, Oct 3, 2018, 1:56 PM user_306160653 <community-manager@cypress.com>

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4 Replies
Honored Contributor II

Karl,

Try to set input pin Pin_1 input mode to "double-sync". The input communicates to external world and is better be sync-ed with UDB components (such as Timer_1).

Also, the UART load is high (15k/sec - do you really need that for a humidity sensor?). I suggest to decimate it:

            uint8 count=0;

            count++;

            if (count==0)

            {

                sprintf(buf, "High: %d, Low: %d\r\n", (65536-hightime)/24, (65536-lowtime)/24);

                UART_1_PutString(buf);

            }

/odissey1

Solo_2a.png

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New Contributor

Thank you, is the double-sync always required when working with the PSOC and these types of components? It does take away what I assume was a sync issue when I enable that. Are there cons to using this feature on the pin?

Additionally, I am still experiencing the same problem regarding the measurement of the pulse and low times. The low time is still counted as a full period rather than just the low time.

Thank you for the cleaner diagram.

Any help on the above is appreciated.

Thanks,
Karl

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Honored Contributor II

I believe that double-sync will delay input pulse by 2 BUS_CLOCK cycles. It

is not always necessary to enable it.

/odissey1

On Wed, Oct 3, 2018, 1:56 PM user_306160653 <community-manager@cypress.com>

View solution in original post

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New Contributor

Thank you for resolving the first issue. I will open the second issue as an alternate thread.

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