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PSoC 5, 3 & 1 MCU

Honored Contributor

Hi,

We are considering DMA for PSoC5LP.

We would like to confirm at what timing the positive edge of tqp trq becomes valid.

Could you tell us the detailed timing when the positive edge of trq becomes effective?

The data sheet of DMA componet does not include detailed timings.

Regards,

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Valued Contributor II

A short positive impulse trq will allow you to interrupt the transmission if it is already active but for too long long and should be interrupted.

The nrq signal will be generated immediately after trq.

Perhaps this is useful for hardware control, but I could not find a use for this. My comments and link to an my example.

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Honored Contributor II

MaMi,

DMA termination happens only if trq terminal (terminate request) is high during drq (DMA request) rising edge. To be honest, it is not very useful.

/odissey1

Screenshot_20200701-032701.png

Honored Contributor

Odissey1-san,

Thank you for your reply.

The following description is included in the data sheet.

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I understand that the meaning of "This signal is only used when the channel is trying to transfer data. A positive edge on this line is ignored at other times." is valid during the rising edge of the drq pin.

The DMA started the first transfer, and interpreted the subsequent transfer as a burst transfer, generating the positive edge of trq during that time, but the DMA did not end at all.

Regards,

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Honored Contributor

Hi,

Let us confirm for only one point.

(a) "The positive edge of trq is valid when the drq pin is at H level" and the DMA ends.

(b) “When the trq pin is H level, the positive edge of drq is valid” and DMA ends.
(c) Both ends DMA

I think it corresponds to (a) in your explanation,
Which action is correct?

Regards,

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Valued Contributor II

A short positive impulse trq will allow you to interrupt the transmission if it is already active but for too long long and should be interrupted.

The nrq signal will be generated immediately after trq.

Perhaps this is useful for hardware control, but I could not find a use for this. My comments and link to an my example.

View solution in original post

Honored Contributor

Thank you for your reply.

I understood that it is difficult to stop DMA at the desired timing by hardware.

Regards,

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