Viktor,
I performed a little more investigation.
I placed some error detection code in the DMA initialization function:
void DMA_memcpy_Init(void)
{
volatile uint8_t dmaerror;
volatile uint32_t dmaerroraddr;
DMA_memcpy_Chan = DMA_memcpy_DmaInitialize(DMA_memcpy_BYTES_PER_BURST, DMA_memcpy_REQUEST_PER_BURST,
HI16(DMA_memcpy_SRC_BASE), HI16(DMA_memcpy_DST_BASE));
DMA_memcpy_TD[0] = CyDmaTdAllocate();
CyDmaTdSetConfiguration(DMA_memcpy_TD[0], 4, DMA_memcpy_TD[0], CY_DMA_TD_AUTO_EXEC_NEXT | DMA_memcpy__TD_TERMOUT_EN);
CyDmaTdSetAddress(DMA_memcpy_TD[0], LO16((uint32)CYREG_NVIC_CPUID_BASE), LO16((uint32)&mem_dst_));
CyDmaChSetInitialTd(DMA_memcpy_Chan, DMA_memcpy_TD[0]);
CyDmaChEnable(DMA_memcpy_Chan, 1);
if( (dmaerror = CyDmacError()) > 0)
{
dmaerroraddr = CyDmacErrorAddress();
CyDmacClearError(dmaerror);
}
}
When executing CyDmaChEnable() I get a return error of (0x4 = CyDmacError()):
| Bit 2 |
CY_DMA_UNPOP_ACC |
Set to 1 when an access is attempted to an invalid address. Cleared by writing a 1. |
When I execute CyDmacErrorAddress() the address returned is CYREG_NVIC_CPUID_BASE.
It appears that the DMA HW cannot access the addresses at CYDEV_ITM_BASE.
Therefore unless Cypress has other information, then
"Is it possible on PSoC5LP to DMA transfer 32 bytes from DWT_CYCLE_COUNT 0xE0001004 to RAM."
NO
Len
"Engineering is an Art. The Art of Compromise."
