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PSoC 5, 3 & 1 MCU

Anonymous
Not applicable

The result of PGA amplifier (internal) was much more than gain setting when input voltage was small.

   

Is there any problem with my kit or something wrong?

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Anonymous
Not applicable
        How much greater?   
How much original gain setting?   
You would be better upload the simplified design.   

View solution in original post

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9 Replies
Anonymous
Not applicable
        How much greater?   
How much original gain setting?   
You would be better upload the simplified design.   

View solution in original post

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Anonymous
Not applicable

How is your set up? ie what is your input and how do you measure your output?

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Esteemed Contributor

Sounds like you are observing noise. If you short the

   

input then you will see just noise on the output. Several

   

contributions -

   

 

   

1) Thermal due to fdbk R's used

   

2) Noise due to PSRR

   

3) Noise due to layout and bypassing

   

4) Internal/external noise due to C coupling effects

   

 

   

To investigate -

   

 

   

1) If you have a spectrum analyzer look at output noise to determine

   

largest fundamental components, then examine if thats correlated to

   

an internal clock or divider or pin bit banging. Turn off all internal UDB

   

digital and other system resources, one at a time, to see what internal

   

resource may be largest contributor.

   

2) Caps, best bulk caps bypassing are polymer tantalums paralled my ceramics.

   

3) Look at any hi z nodes in signal path, they will be susceptable to coupling via

   

stray C.

   

4) If driving high C loads, like gate of external MOSFET, look at return current

   

paths, make sure they are "stiff".

   

5) Using scope on infinite persistance look at supply rails, to get an idea of

   

what pk-pk noise levels you are dealing with.

   

 

   

Regards, Dana.

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Anonymous
Not applicable

 the input voltage was 1.6mv, the gain set is 22, then the result was more than 100mv

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Esteemed Contributor

Don't forget the PGA is not RRIO -

   

 

   

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Esteemed Contributor II

Additionally: input offset max = 10mV times 22 gives 220mV which is well within your measured 100mV

   

 

   

Bob

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Esteemed Contributor

Thtas true if sign of input offset is +, otherwise the results quite different.

   

 

   

You can always measure the offset with A/D, and subtract it out. Thats because

   

DelSig CM in is 100 mV ouytside the rails.

   

 

   

The beauty of PSOC, ability to do a lot of self test.

   

 

   

Regards, Dana.

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Honored Contributor II

Out of curiosity - how can I measure the (internal) offset voltage of an OpAmp? (Apart from shorting the inputs and then measuring the output)

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Esteemed Contributor

This basic approach might be usable (you can always use muxing, S/H in general designs) -

   

 

   

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