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PSoC 5, 3 & 1 MCU

Anonymous
Not applicable

 Hi all

   

 

   

Is possible use more than one ISR for CY28C29466 chip ?

   

 

   

Especialy two independent Counter ISR.

   

 

   

Very thanks help

   

 

   

Kamil

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12 Replies
ETRO_SSN583
Esteemed Contributor

Yes, each digital block can supply an ISR trigger to interrupt controller. For example,

   

if you had an 8 bit counter in DBB00 and ISR is enabled, that block will generate

   

interrupts. If, in addition, you placed in DBB01, DCB02, DCB03, other "8 bit" modules,

   

like timers......and enabled their interrupts they also would generate exceptions.

   

 

   

Look in TRM for a chapter on the Interrupt controller.

   

 

   

Remember to modify boot.tpl, in root project directory, to modify the interrupt vector

   

call.

   

 

   

http://www.cypress.com/?id=4&rID=36720

   

http://www.planetpsoc.com/psoc1-articles-digital/13-basics-of-psoc-gpio.html?start=6

   

http://www.planetpsoc.com/psoc1-articles-analog/57-psoc-1-adcs--the-five-golden-rules.html

   

http://www.planetpsoc.com/component/content/article/43-writing-a-c-isr.html

   

 

   

Regards, Dana.

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Anonymous
Not applicable

 Thanks info but not working ! Only one ISR working.

   

 

   

#include <m8c.h>

   

#include "PSoCAPI.h" 

   

 

   

#pragma interrupt_handler Counter16_1_ISR;

   

#pragma interrupt_handler Counter16_2_ISR;

   

 

   

const char SineTable64[] = {

   

127, 139, 152, 164, 176, 187, 198, 208, 217, 225, 233, 239, 244, 249, 252, 253, 

   

254, 253, 252, 249, 244, 239, 233, 225, 217, 208, 198, 187, 176, 164, 152, 139, 

   

127, 115, 102, 90, 78, 67, 56, 46, 37, 29, 21, 15, 10, 5, 2, 1, 

   

0, 1, 2, 5, 10, 15, 21, 29, 37, 46, 56, 67, 78, 90, 102, 115

   

};                       

   

 

   

 

   

void main(void)

   

{

   

 

   

M8C_EnableGInt;          

   

    

   

Counter16_1_Start();

   

Counter16_1_EnableInt();

   

 

   

Counter16_2_Start();

   

Counter16_2_EnableInt();

   

    

   

DAC8_1_Start(DAC8_1_HIGHPOWER);

   

DAC8_2_Start(DAC8_2_HIGHPOWER);

   

   

 

   

    while(1)

   

    {

   

    }

   

}

   

 

   

 

   

void Counter16_1_ISR(void) 

   

{

   

DAC8_1_WriteBlind(SineTable64[Pointer]); 

   

Pointer++;

   

if (Pointer >= 64) Pointer = 0;

   

}

   

 

   

 

   

void Counter16_2_ISR(void) 

   

{

   

DAC8_2_WriteBlind(SineTable64[Pointer]); 

   

Pointer++;

   

if (Pointer >= 64) Pointer = 0;

   

}

   

 

   

 

   

Please help me many thanks.

   

 

   

Kamil

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ETRO_SSN583
Esteemed Contributor

What does your boot.tpl look like ? Did you change the correct

   

vector. For 16 bit counters it is the least significant byte block.

   

 

   

Post your project........

   

 

   

Regards, Dana.

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ETRO_SSN583
Esteemed Contributor

Correct prior post, most significant byte block is interrupt source.

   

 

   

So if 16 bit counter is placed in DBB00, DBB01, modify the vector in boot.tpl

   

for DBB01. Make sure your C ISR name used in boot.tpl is prefixed with an

   

underscore, eg C name is MyISR, boot.tpl name is _MyISR.

   

 

   

Regards, Dana.

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Anonymous
Not applicable

Here is my modified sine wave example

   

2x counter

   

2x DAC

   

 

   

Thanks help

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ETRO_SSN583
Esteemed Contributor

You need to modify boot.tpl in root project directory as follows -

   

 

   

Change this

   

 

   

    org   24h                      ;PSoC Block DBB01 Interrupt Vector
    `@INTERRUPT_9`
    reti

   

 

   

to this

   

    org   24h                      ;PSoC Block DBB01 Interrupt Vector
    ljmp _Counter16_1_ISR
    reti

   

 

   

do the same for DCB03 in boot.tpl, using _Counter16_2_ISR

   

 

   

Regards, Dana.

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ETRO_SSN583
Esteemed Contributor

Also declare Pointer as volatile, and use 2 Pointers, Pointer1, Pointer2,

   

so the two ISRs do not modify each others pointers.

   

 

   

Regards, Dana.

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JoMe_264151
Expert II

A Counter16 enters an LJMP into boot.asm in the very right place already, so there is no need to change Boot.tpl. It is a call into the CounterINT.asm-file where you can find a place to insert an LJMP to your interrupt routine. This place is clearly marked and you did it already for Counter16_1 but not yet for Counter16_2. So have a look into the library file Counter16_2Int.asm.

   

 

   

Bob

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ETRO_SSN583
Esteemed Contributor

Yiou can do this either of two ways, the one I suggested, the one Bob suggested,

   

each with its own advantages -

   

www.planetpsoc.com/component/content/article/43-writing-a-c-isr.html

   

www.cypress.com/

   

 

   

Regards, Dana.

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JoMe_264151
Expert II

Yes, Dana. But I prefer programming the same problem the same way when needed twice. Reagardless which way you prefer,  one (working) solution was already there.

   

 

   

Bob

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ETRO_SSN583
Esteemed Contributor

No problem Bob with your personal preferences.

   

 

   

Dana.

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Anonymous
Not applicable
        Many many thanks Dana and Bob this is working fine 🙂 Kamil   
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