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# PSoC 5, 3 & 1 MCU

New Contributor

## PSOC 5LP PWM output

Hey,

I need to use a PWM at around 1.4KHz given to a MOSFET gate. At the source of the MOSFET, I am using a 1.4V supply for my custom application. Due to the MOSFET VDS being 1.4V, I need the VGS (The PWM output) to be 0.4-0.5V while maintaining the 1.4KHz frequency. Is it possible to vary the output voltage level of the PWM while keeping the duty cycle, frequency constant?

1 Solution
Honored Contributor II

## Re: PSOC 5LP PWM output

BhSr,

I can think of three ways to accomplish what you are asking.

Solution 1: Resistor Divider

Assuming the PSoC5's VDD is 5V, you can use a resistor divider network to lower the PWM output voltage to 0.5V.  The downsides of this solution is it requires two resistors and it not great for dissipating the charge on the gate due to the gate capacitance.

Solution 2: Using a WaveDAC to control the Voh to 0.5V

You can take the output of the PWM to the waveselect (ws) of a WaveDAC8.  A "0" will select Waveform 1 (DC 0V) and A "1" will select Waveform 2 (DC 0.5V).

• You can control the gate drive voltage to within 1mV.
• If you use an Opamp to buffer the WaveDAC output and place the output of the Opamp on certain pins, you have up to 25mA of current sink available to dissipate the gate charge.

Solution 3: Using an SIO pin in Vreg Out mode.

If you use any of the pins on a SIO port (on the PSoC5 that is port 12), you can attach a VDAC set to 0.5V to have a regulated output of 0 to 0.5V from the PMW.

Advantages: Same as Solution 2 except needing fewer internal resources.

Len
"Engineering is an Art. The Art of Compromise."
8 Replies
Honored Contributor II

## Re: PSOC 5LP PWM output

BhSr,

I can think of three ways to accomplish what you are asking.

Solution 1: Resistor Divider

Assuming the PSoC5's VDD is 5V, you can use a resistor divider network to lower the PWM output voltage to 0.5V.  The downsides of this solution is it requires two resistors and it not great for dissipating the charge on the gate due to the gate capacitance.

Solution 2: Using a WaveDAC to control the Voh to 0.5V

You can take the output of the PWM to the waveselect (ws) of a WaveDAC8.  A "0" will select Waveform 1 (DC 0V) and A "1" will select Waveform 2 (DC 0.5V).

• You can control the gate drive voltage to within 1mV.
• If you use an Opamp to buffer the WaveDAC output and place the output of the Opamp on certain pins, you have up to 25mA of current sink available to dissipate the gate charge.

Solution 3: Using an SIO pin in Vreg Out mode.

If you use any of the pins on a SIO port (on the PSoC5 that is port 12), you can attach a VDAC set to 0.5V to have a regulated output of 0 to 0.5V from the PMW.

Advantages: Same as Solution 2 except needing fewer internal resources.

Len
"Engineering is an Art. The Art of Compromise."
New Contributor

## Re: PSOC 5LP PWM output

Hello,

Thank you for your response. I forgot to mention one another caveat. My load, which is placed at the drain, draws a current of 50mA constantly. From what I understand, the PSoC 5LP output pins are not capable of supplying this much current, right? Is there any way to achieve this with any of the three solutions you have indicated? Will appreciate you assistance on this.

Thanks.

Honored Contributor II

## Re: PSOC 5LP PWM output

Another variant  of using SIO pin is to employ Vref source as driving voltage, which is set to some low value, for example 0V (GND). In  this case the SIO pin output will not go down all the way to the 0V, but will stay limited to about 0.45-0.5V, which is bottom limit. This will save a VDAC.

Project attached.

New Contributor

## Re: PSOC 5LP PWM output

Thank you very much for the project file. I forgot to add another point here. My load draws a current of 50mA constantly. Is there any way to employ this method such that I get 50mA current at the Load?

Once again, appreciate your response. Thank you very much.

Honored Contributor II

## Re: PSOC 5LP PWM output

BrSr,

It common to use a transistor like a NPN BCR-505.  It can sink > 100mA with a Vce(sat) of 0.3V.

Len
"Engineering is an Art. The Art of Compromise."
New Contributor

## Re: PSOC 5LP PWM output

Thank you very much for your help! I have accomplished it using an N-channel MOSFET.  Appreciate your help.

Honored Contributor II

## Re: PSOC 5LP PWM output

The SIO ins are rated up to 4 mA source (20 mA sink). PSoC5 has 8 SIO pins. By ganging together 8 SIO pins, total current can be increased up to 8x4mA=32 mA (source), which is lower than 50 mA required. I would use external FET instead.

Can you describe more what are you doing, a schematic would be the best

New Contributor