In a PSoC 3 design I need a differential amplifier but it does not seem to work.
I created a simpler design for the CY8CKIT-030 (as attached):
Two voltage VDACs drive the two inputs of a PGA the output of the PGA can be observed through
a voltmeter and the ADC.
I can control the VDACs and PGA settings through USB.
I checked the settings of the PGAs (PGA_1 in the schematic is implemented by SC0 as seen by the chip so the
relevant registers are 0x5800 pp):
'0x0c', '0x2e', '0x01', '0x00'
So the GNDREF - field in SC0_CR2 is 0, which -- according to the register TRM means the external input is used.
And still, the output of my circuit depends only on the voltage of VDAC8_1, i.e. the positive input of the PGA.
The output is as if the reference input was at 0.
I also checked the analog routing representation and this seems to be correct, the output of SC2 goes to the input of SC0.
I did not find many examples that use the PGA, but maybe someone in the forum has more experience with them.
If not, I need to open a case, I guess.
Sorry, that took some time.
I had to create a design from scratch, that does not use any copyrighted/confidential code
It is made for the CY8CKIT-059, the PSoC 5LP gum stick.
The attached demo project is usable though not very comfortable from the point of command line use.
The demo is accessed through the KitProg emulated uart with 9600 baud.
You can enter single letter commands ABGHRSTN,
A and B set the output voltage of the two VDACs,
RST give the result of the three ADCs.
The relevant unit is PGA3, which is programmed to use an external reference from PGA2.
However, no matter how the output of PGA2 changes, the output of PGA3 is constant, only depends on
Here is an example session:
In the lines with just "=", the R command was given.
The correlation between the VDAC and SAR-ADCs is reasonable, the VDAC generates 4mV per LSB,
the PGA amplifies with a factor of two, and the ADCs readout 0.5mV per LSB, so we have an
amplification of a factor of 16.
So when setting VDAC1 to 30 (command "A30"), we readout at ADC_SAR2 513, the offset of 30 seems to be constant.
The SigmaDelta ADC is set to 16bit for 0 .. 2.048V, so we have a factor of 256 from the DAC's input values.
The correspondence of 30 ==> 8242 and 20 ==> 5669 is approximately right.
However, no matter how B is changed, the result stays the same.
Is the input range for the reference input so narrow?
PGA3 behaves as if the reference was internal GND.
In my re
To make a long story short:
The PGA-equation is
Vout = Vref + (Vin-Vref)*Gain.
What I needed was a difference amplifier, so the first term was disturbing.
In application note AN 60319, a difference amplifier using two PGA is shown (Fig. 3).
However, for the current sense amplifier that I need, there is a common mode voltage,
in my case of 1.0V.
Since in the Two-PGA version the negative input signal is amplified with 2, the common mode level of 1.0V
would get the output outside of the analog operation range.
Therefore, the PGA for the negative input needs a constant reference voltage, e.g. 0.256V.
However the reference input of the PGA is low-resistive and the reference voltage cannot loaded, so a third PGA (with gain=1)
is needed to create a stable reference voltage.