cancel
Showing results for 
Search instead for 
Did you mean: 

PSoC 5, 3 & 1 MCU

Anonymous
Not applicable

I would like to measure the time between two rising edges to calculate speed with a hall effect sensor (30000rpm).

Ideally, I would like an up-counter that would capture on a rising edge to a LIFO buffer or single register and then reload the counter.

The problem is that the only counters available use FIFO buffers that overwrite to the front of the buffer, making it hard to tell which value was the latest value. If the buffer has not overflown, then the newest value is at the back. However if the buffer has overflown, then the newest value is at the front. However, since there is no overflow status bit, I would be forced to interrupt the processor on every capture to make sure the FIFO buffer does not overflow. I do not want to have to interrupt the processor so often. Is there a way to avoid using interrupts, avoid using polling, and avoid writing VHDL for my own counter? Thank you.

0 Likes
1 Solution
RodolfoGL
Employee

Hi,

You could use DMA to transfer from the FIFO buffers to somewhere in the SRAM. You can trigger the DMA to transfer only twice, then disable it. It triggers when there is data available in the counter FIFO. Before enabling the DMA, make sure to clear the counter FIFO.

View solution in original post

0 Likes
2 Replies
RodolfoGL
Employee

Hi,

You could use DMA to transfer from the FIFO buffers to somewhere in the SRAM. You can trigger the DMA to transfer only twice, then disable it. It triggers when there is data available in the counter FIFO. Before enabling the DMA, make sure to clear the counter FIFO.

View solution in original post

0 Likes
Anonymous
Not applicable

Thank you! I ended up just never allowing the buffers to overflow. They should only be accessed at around 500Hz, which is okay and a lot less frequent than I thought.

0 Likes