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PSoC 5, 3 & 1 MCU

Anonymous
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I need to implement a battery powered system using a PSoC 1 chip. I read that there is a Sleep mode in PSoC 1, what exactly happens when we use this Sleep mode? Which peripherals go to sleep and which are awake? Can someone help me with this information?

   

Thanks

   

Tanisha

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Anonymous
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Tanisha,

   

When you put the device in sleep mode, IMO is shut down. This causes all the systems, which run on clock derived from IMO, to stop working.

   

But note that the analog blocks power is not removed during sleep. You need to manually write into registers to shut the power in analog section.

   

This application note describes power saving techniques in PSoC 1 device -

   

http://www.cypress.com/?rID=34189

   

 

   

-Rajiv Badiger

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Anonymous
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Tanisha,

   

When you put the device in sleep mode, IMO is shut down. This causes all the systems, which run on clock derived from IMO, to stop working. ILO (internal low speed oscillator) is the only clock source active in the system during sleep mode.

   

But note that the analog blocks power is not removed during sleep. You need to manually write into registers to shut the power in analog section.

   

This application note describes power saving techniques in PSoC 1 device -

   

http://www.cypress.com/?rID=34189

   

 

   

-Rajiv Badiger
 

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Esteemed Contributor II

Also, do not forget to power-down (Hi-Z) all unneeded pins before going to sleep (cut the light) since the IO-system still may consume power when drawn from the pins. The switch mode pump will run in sleep mode as well.

   

 

   

Bob

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Esteemed Contributor

Be aware that any pins placed into HiZ by definition "float" the

   

pin to an unknown level. So if you are driving other cmos logic

   

or say a power MOSFET you have undefined drive levels. This

   

in turn, in the case of CMOS logic, could draw a lot of current

   

in the off chip logic. Or in case of power MOSFET could leave

   

a device turned on, like a relay or motor control or.....So short

   

answer is plan on terminating these drive levels to externals

   

to insure your external stuff is not drawing power. Low power

   

design by definition has to include total system considerations,

   

not just the UP.

   

 

   

Regards, Dana.

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Esteemed Contributor

A good reference on floating drive levels -

   

 

   

http://www.tij.co.jp/jp/lit/an/scba004c/scba004c.pdf

   

 

   

Regards, Dana.

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Anonymous
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Tanisha, You are right that there is a Sleep Mode in PSoC 1 and it is used to reduce the average current consumption of PSoC 1. The internal main oscillator (IMO), flash memory, and the bandgap voltage reference are powered down in the Sleep mode whereas the supply voltage monitor and switch mode pump (SMP) continue to operate to assure that the PSoC remains stable and can resume operation again. You can read more about this on page 2 of the "PSoC® 1 Power Savings Using Sleep Mode" Application Note which can be downloaded from the link - http://www.cypress.com/?rID=34189

   

There are other things that you must do to reduce the power consumption

   

1. Disable analog references

   

2. Disable analog buffers

   

3. Diasable SC/ST blocks

   

4. Set the GPIO drive mode to Analog High-Z

   

You can read more about how to do this from pages 4 and 5 of the Application Note.

   

Regards

   

Anshul

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Anonymous
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Tanisha,

   

You can also download the project from the Application Note link, it shows how you can enter sleep mode and how you can implement other power savings techniques.

   

Regards

   

Anshul

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Anonymous
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 Thanks to all for helping me get the answer to my question.

   

- Tanisha

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