I recenttly had alook at one of the header file and it had a seperate code for PSoC4!!!
Can any one say as to what are the features of this new product?
Yes, a PSoC4 will come. Cypress keeps a bit qiuet about its features, but I suspect that the core will be an ARM M0 to keep it cheap. There are some videos which compare the 8051 core to ARM M0 and not to Cortex M3, I suspect a reason behind that. Which analog and digital hardware modules are to come? Let me guess: the concept and the structure of USBs is successful, so "never change a winning team".
... and one more: here is a link to a nearly one-year old thread discussing the very same theme. Now we can imagine that it will take at least anothere year until there are engeneering samples of a PSoC4 (Smile)
We have been especulating about PSOC4 for about a year already. A PSOC today video hinted that we were going to get a Cortex-m0 PSOC so we asumed it would be the legendary PSOC4. Still, there are no official news about it tho.
Speculation is over:
SAN JOSE, Calif., March 20, 2013 – Cypress Semiconductor Corp. (NASDAQ: CY) today unveiled the PSoC® 4 programmable system-on-chip architecture, which combines Cypress’s best-in-class PSoC analog and digital fabric and industry-leading CapSense® capacitive touch technology with ARM®’s power-efficient Cortex™-M0 core.
Read more at www.cypress.com/go/PSoC4
Thanks for letting the community know that PSoC 4 will be real. When I looked at the website you mentioned, there was an obvious lack of data.
Here is what I found (and like)
Op-Amps, Comparators, IDACs, precision voltage reference.
" stop mode consuming only 20 nA while still retaining its ability to wake up, complemented by an extremely low-power retention sleep mode that draws only 150 nA without disturbing SRAM data"
? without disturbing SRAM data ? Guess it means while fully retaining SRAM content
From the architecture brief.
"Most Reconfigurable ARM Cortex-M0" Oops - Does Cypress own an architecture license to reconfigure the core?
After waiting a few days whether there is going to be more data to digest, I am somewhat disappointed what is (not) communicated about PSoC 4
- is the PSoC 4 an upgrade to PSoC 3? - The CPU indicates yes 8-bit -> 32-bit, The ADC indicates otherwise 20-bit -> 12-bit?
- memory? 32k/8k ? 64k/8k? 128K/12k like other M0 devices on the market?
- Max frequency? PSoC is not about high frequency, acknowledge that, it is still very interesting what algorithms can be used within the computing performance of the PSoC 4
- current consumption in low power modes are important, however, sometimes the device needs to be activated - consumption in active mode?
- is there a switch for Creator 2.2 to fully activate PSoC 4? - or are we waiting for Creator 2.3 (3.0)?
- the video included a USB-FS block (39sec and 1:15min), the architecture brief does not - what is it?
It is unusual for Cypress to announce a new device with so little information accompanying the press release. Rumors about PSoC 4 have been lingering in this forum for more than a year, there must be something like a prel. data sheet!
Please post it!
The reduced ADC resolution you mentioned comes from the fact that the PSoC4 comes with a SAR ADC, which runs at 1MSpS (like the PSoC5LP). There is just no DelSig-ADC like the PSoC3 has. But as we learned in another thread here, one could build one with theavailable components and the UDB. Or you just use oversampling...