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Hello!
How to generate an interrupt from comparator's output without using any DigBuf module? Can I get two interrupts using the same transition before & after routing to a DigBuf ? I read related stuff on cypress documentation but wasn't able to figure out anything conclusive.
I did include pragma interrupt_handler in the beginning. I tried incorporating ljmp _Comp1 (taking Comp1 as the name) in boot.tpl file & then to begin with, in my ISR, which I'm coding in C, I tried to change an LED's status everytime an interrupt occurs but couldn't succeed. Tell me the correct sequence and/or example code for the same.
Thanks a lot.
Solved! Go to Solution.
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I tested --- it works fine.
There is a file generated named COMP_INT.asm where the modifications have to be made
Attached is a working project. External connection is needed from Port0_0 to Port0_1, interrupt occurs once a second.
Bob
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hi ramanathan,
i too was facing the same problem when trying to use an interrupt directly from a comparator bus but i could'nt achieve that. the most i could do was to route it to a digbuf module and use its interrupt for my application. i would be glad if someone from the cypress community can help us out.
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I cannot see any pitfalls with the comparator so far: Depending on the analog column the appropiate interrupt in Boot.tpl has to be changed (Interrupt #2 to 5) and the interrupt has to be enabled for the comparator via the API.
I think, I'll test that.
Bob
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Small correction: Interrupt occurs every 2 seconds.
Bob
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Hallo Bob!
I tried your code. It works fine. Generating interrupt from the comparator bus was successfull. Danke 😉
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@ramanathan
You are always welcome! Where did you pick up your german vocabular?
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I had an activity in college where I'd to learn a bit of german. Not even an amateur. You're a gentleman - sticking to english even when triggered 😛
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So you may call me GentleProgrammierer (broad smile)
Bob
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Bob,
A little madness from my side - just got this thought ; I configured SC block as a comparator - I got a nearly digital o/p. i.e the edges are not as sharp as it would be if a comparator is made using a CT block BUT with LESSER noise.. Can these raw transitions from 0-5 V, when directly routed to pins, trigger GPIO Interrupts ?
Danke, RAM
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Instead of routing the SCBLOCK based comparator output to a pin and then generating interrupt, you can route the comparator output directly to a comparator bus present in every analog column. You can then enable the comparator bus interrupt.
You can refer AN2108 - Implementing Hysteresis Comparator -
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I'm using an SC block as a comparator. & I've routed the o/p to the Comparator's bus - Is that what you mean by enabling the comparator bus or there are any specific instructions to accomplish this ?
RAM
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That is correct. You can do this in chip editor of PSoC Designer itself.
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@ rjvb,
Thanks but what's not clear to me is different - I'm asking how to use the o/p of ComparatorBus_0 as an interrupt ?
(Note - I dont want routing using DigBuf as that makes my o/p noisy ; I'm NOT using a CT comparator user module but an SC block's analog transition on CompBus)
Regards, RAM
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I believe its this register -
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http://www.cypress.com/?rID=2780
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And don't forget to modify boot.tpl, root directory of project, with ljmp ISR name
for that column -
org 08h ;Analog Column 0 Interrupt Vector
`@INTERRUPT_2`
reti
org 0Ch ;Analog Column 1 Interrupt Vector
`@INTERRUPT_3`
reti
org 10h ;Analog Column 2 Interrupt Vector
`@INTERRUPT_4`
reti
org 14h ;Analog Column 3 Interrupt Vector
`@INTERRUPT_5`
reti
You replace the "`@INTERRUPT_n`" contruct with -
"ljmp ISRname" ( if ISR is a C solution, say COMPisr, then use as its name, "ljmp _COMPisr"
Regards, Dana.